[ee_shoppahs] Fwd: ASIC (Logic) Verification/Validation (FPGA to ASIC conversion) 6-12 months contract to perm job opportunity in Santa Barbara, CA (US citizen or Green card is required)
- From: Marcus Sun <marcus_sun@xxxxxxxxx>
- To: shoppahs shoppahs <ee_shoppahs@xxxxxxxxxxxxx>
- Date: Wed, 7 Jul 2010 19:18:55 -0700 (PDT)
----- Forwarded Message -----
From: "Doron Ruttert" <doron@xxxxxxxxxxxxxxxxxxxxxxxxxx>
To: "Marcus Sun" <marcus_sun@xxxxxxxxx>
Sent: Wednesday, July 7, 2010 6:34:21 PM GMT -08:00 US/Canada Pacific
Subject: ASIC (Logic) Verification/Validation (FPGA to ASIC conversion) 6-12
months contract to perm job opportunity in Santa Barbara, CA (US citizen or
Green card is required)
Good evening,
If you may be interested in this 1 year contract to perm job opportunity in
Santa Barbara, CA area (On site) and technically a good fit, please forward
your updated resume and list your minimum hourly rate and start date
availability?
If you are not available/interested any referral would be greatly appreciated.
Have a nice evening!
Doron Ruttert President
S&D engineering Solutions
(503) 639-3546
Validate logic designs. Develops and maintains test benches using VHDL &
Verilog (NO System Verilog is used currently but the client will transfer over
time to System Verilog), validation scripts and configuration management
utilities. Designs test benches from high level specifications. performs
simulations of developed code. Resolves problems in conjunction with logic
designers. FPGA and ASIC logic Design need to satisfy project requirements.
Develops approaches and methodologies needed to produce logic functions.
DUTIES
. Derives requirements for electronics design tasks from system specifications
by working with both internal and external customers.
. performs systems design trades relating to logic, hardware and software.
. Design FPGAs and ASICs for camera system functions including camera timing,
non-uniformity compensation, automatic gain control, command and control
interfaces, and video generation. Memory interfaces will include SDRAM, flash.
Some systems will also include DSP interfaces.
. Works with teams including systems and software engineers to refine
requirements and interfaces. Works with project/program managers to define
schedules and strategy.
. Performs design verification including creating plans, generating test
stimuli, running and debugging tests for the integration and production phase
of products.
. Prepares and presents design reviews to teams and other groups of customers.
. Maintains build tree and associated scripts.
. Works with advance development teams to assist in specifying upcoming
projects.
. Provides leadership and guidance to other team members as needed.
. Responsible for releasing an maintaining complete design documentation
according to procedures and supporting manufacturing and customers throughout
product life.
Qualifications:
REQUIRED EDUCATION, EXPERIENCE & SKILLS
. BSEE or other Bachelor's degree in a related discipline; Master's Degree
strongly preferred
. Minimum of 10+ years of related experience
. Current CAD tools for logic simulation, logic synthesis, FPGA and ASIC tool
flows and design verification
. Expertise with logic test bench and validation tools, environments and
practices
. Understanding of issues relating to digital design, imaging, timing,
synthesis, etc.
. Good understanding of system level concerns as related to logic design and
validation
. Troubleshooting complex design problems
. Lab equipment such as oscilloscopes, meters, analyzers and power supplies
. FPGA to ASIC conversion
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