Hi all, As the 20H rule seems to have resurfaced again, I thought I would resend the full explanation from the originator W.M King. This provides some pertinent historical background and technical information as to the orgination of the undercut Vcc plane concept. Best Regards Charles Grasso Senior Compliance Engineer Echostar Communications Corp. Tel: 303-706-5467 Fax: 303-799-6222 Cell: 303-204-2974 Email: charles.grasso@xxxxxxxxxxxx; <mailto:charles.grasso@xxxxxxxxxxxx; > Email Alternate: chasgrasso@xxxxxxxx <mailto:chasgrasso@xxxxxxxx> *****************************************STARTS **************************************************************************** ***************************** ---------------------------------------------------------------------------- ------------ Circuit Boards, Planar Impedance Reflections, Resonances, Edge Coupling, and genesis of what came to be termed "The 20-H Rule". Observations and discussion. During the time frame from the mid-70's to the approximate mid-80's, several manifestations were observed as exhibited in EMI propagation data derived from circuit boards and their placement with respect to conductive chassis structures. a. The impact of distributive coupling between the circuit board and the chassis "plane" was noted in modes of both localized eddy currents (now approximately termed the "surface patch" effect) and as a common-mode distributive, sequential, line. The mode of propagational operation between these effects was observed to exhibit a causal relationship with the phasing of current as it propagated across the circuit board planes along with the related "image" in the chassis. Sequential current flows, as would be experienced with a logic bus, tended to operate as a consecutive line where unique devices (such as a single device that was asynchronous to the others on the board) would present a localized eddy current respect to the chassis plane surface. b. The influence of "distributive inductance" exhibited by what I now term "patterned layout inductance" caused by via anti-pads (holes) in the ground and power planes was investigated, noting that these "patterns" were presented as a phased-array in circumscription of the circuit devices. These "array effects" significantly modified the impedance of the common-mode distributive line that was established between the chassis plane (surface) and the circuit board as the excitation member of the "line". The relationship between the mode of operation as either a localized eddy current (surface patch) or a sequential cascade of a distributive line, was predicated upon the shape-formation of currents, and their phase relationships, across the "patterned layout inductance". These, in turn, coupled through fields onto the chassis plane as a potentially mixed-mode distributed line. In this same period of time, 20 years ago, the intensity of the "peak power currents" (now termed "Ipp" for purposes of my descriptions) that were demanded into circuit devices and displayed in magnitudes that were many multiples of the cumulative signal currents, were studied and found to be sourced by a combination of the instantaneous charging of capacitive effects in both circuit die and layout. These effects also operated in conjunction with cross-conduction edge-transitions between the potential rails across various drivers. (Note that the spatial field transfer impedance between a board and a chassis plane distanced at approximately 0.5 cm in the near-field/magnetic dominant condition, will approximate < 40 Ohms at frequencies below 1 GHz.) c. Resonances in the spectral patterns propagated from the circuit boards themselves and in an inter-relationship between the transfers from the boards to the adjacent chassis plane (or other circuit boards, if stacked or co-planer) were observed, particularly in examples of 4 layer boards wherein the logic ground (L0) plane was separated from the V-plane by perhaps 30 or 40 mils. In these conditions, the intense "Ipp" currents migrating as flux between the power planes were noted to form eddys around the anti-pads, and inducing power current edge transients into the series inductance of the (signal) via barrels themselves. These observations sequentially yielded other conclusions, including the inadequacy of flux-cancellation due to phase shifts as dichotomies resultant from the via transitions as well as the phase relationships of the flux image between the logic signals pull-up/down currents with respect to the currents sourced in signals of various devices. The net dynamic result was that the anti-pad array effect because sequential inductance within the common-mode formations of the board. d. Concurrently, the contemplation of "Ipp" current flows between the planes of a circuit board yielded curiosities about how these currents propagated into the circuit devices, particularly in terms of topology. It was noted as highly probable that when circuit devices were located near the edge extremities of a circuit board, and that when the "Ipp" storage capacitor was located at the periphery of the device which in turn was at or near pins close to the edge, the flux return capture would be perhaps inefficient at the edge which in turn probably propagated into chassis structures as fields that were in very close proximity to the edges of the board. Indeed, studies with local (electro-statically shielded) loop probes provided the suggestion that in certain conditions of current paths in topology as related to the circuit board edges, an intense fringing of the flux as a coupling edge-field could be exhibited. Though conditionally related to the proximity and dimension to the board-edge, with a dimensional dependency upon the separation of the planes, the edge-field distributed transfer could result in a coupling coefficient to other structures in the low tens of Ohms. These transfers, assuming that the circuit board was not directly referenced to return the flux-transferred current in "ground stitches", would impact the potential difference between the board and the chassis plane, and hence across the distributed line in either the localized eddy current (patch) or distributive sequential mode depending upon the proximity of either with respect to the edges. As a concept, the inspection of how, and where, and in what topological distribution, does the "Ipp" current propagate became of high interest as related to the edges of the planes. e. With the understanding that edge-based, "Ipp" derived flux and associated currents could be redirected back into the circuit board conceptually by undercutting one of the power planes with respect to the other, or "shielded" in boards with multiple parallel L0 planes through interties of "picket fences" constructed of inter-L0 vias, the initial concept of "undercutting planes" evolved. f. There were two constructions subjected to evaluation with respect to undercutting planes. The first evaluation was directly related to the fringing of edge flux and fields as implied or stated above, with relatively intense "Ipp" currents positioned/propagating at or on the plane edges with the connotation that the specifics of "patterned layout inductance" could impact the distribution and specific direction of the current flow path. In this consideration of approach, the implementation of plane-undercuts appeared as related to the flux and field patterns (previously identified and mapped) analogous to those understood as surrounding traces (which I termed "the 3-W Rule" as only a description for purposes of relating the "envelope" of the near proximity effects associated with signal traces and their flux and field shapes of micro-striplines). Also observed in this conceptual frame were the effects of dichotomies in the images for signals in the L0 planes caused the disruptions due to signal flux eddy in circumspection of the anti-pads from via penetration of the planes. It was considered that if flux image disruptions from anti-pads were significant at fast edge-times (<1nS) exacerbated by an array of via/anti-pads along the "shoulders" of the trace flux capture, then a similar effect could be manifested at the edges of the circuit board, assuming that the "Ipp" current and related flux pattern were propagating in extensions toward the edges. g. With the curiosity initiated for the first effect related in the paragraph above, the consecutive curiosity inspired interest when the circuit devices were positioned at distance far away from the edges of the circuit board. In this consideration (acting in conjunction with the first concept above) the "typical" circuit board comprised effects that approached a distributed "lattice" wherein the "patterned layout inductance" of the anti-pads as arrays surrounding the circuit devices contributed to a high non-uniformity (i.e., the pattern of the anti-pads is significantly different in density and geometry around each device) in the common-mode distribution of fields across the board, it was interesting to note that edge-regions of a board might represent unterminated and accumulated distributive "stubs" in the Z-axis. When the separation between planes was reduced to perhaps 5 mils, with a commensurately reduced power-distribution impedance, the equivalent impedance value of the planes would be well below 10 Ohms, though this is disturbed to a significant extent by the "patterns" of the anti-pad array inductance equivalency. Given that concept, the contemplative concept extended, it was probable that significant edge-inward unpopulated board regions would be not appropriately terminated as transmission lines, and that this effect would be exacerbated when the last devices were of low current (higher power impedance) demand when compared to devices positioned further away from those devices (e.g., more distant from the edges) of intense current demand (better matching and terminating the power plane impedance as transmission lines). (Note: The "Ipp" edge-time demand current into a processor-type device suggests that the loading impedance can approach dynamically 0.5 Ohms cumulatively into all power pins of the device.) h. In both the first and second considerations noted in over-view above, it was perceived that undercutting the one of the planes, typically the V-plane, toward the formation of circumscribed boundary where the planes were actually loaded by circuit devices, would either redirect (in the concept of the first - edge flux - consideration) the flux and field pattern back into the circuit board in a manner analogous to the flux and field envelop of traces noted in the "3 and 10 W-Rules" reducing edge fringing, OR (for the second consideration) actually use the boundary of the devices, (e.g. using the devices themselves to serve as terminations for the edges of the V-planes) reducing reflections and possible resonances established by unterminated regions of the planes in the board topologies. i. In the process of these descriptions, somewhere, someone, noted that in the period where "1206" sized devices were used in conjunction with dual-in-line packages, and that these could be near the edges, the undercut distance would approximate 100 mils, or about 20 times the separation of 5 mils between planes. Hence the phrase "20-H Rule" was born, without consideration of the relevance of the application or implementation. In actuality, the purpose of the undercut was (and is) to bring the edges of the V-plane to the limit of the boundary upon which it is terminated, minimizing reflections caused by distributed and unterminated "stubs" in the Z-axis in unpopulated regions of the circuit board. This, by itself, also tends to limit the fields at the edges of the board simply because the flux pattern and the fields are more constrained. This approach is also useful to consider not just upon implementation of the edge-effects at the board extremities, but for partitioning adjacent regions utilizing "moats" and "bridges" (also terms attributed to myself) to constrain fields that may couple into a moated region. Given that this construction is perceived to be of extreme simplicity, even to the point of being seen as obvious, it is with high fascination that the rattle and intensity of discussion surrounding this concept has been observed. The concept, as related in a patent that was granted by E. Pavlu and J. Lockwood related to plane termination, is simply to facilitate termination of "stubs" that are formed in the Z-axis with plane separations of typical dimension with the added effect of containing the edge field fringing simultaneously. In the program "EMCT: Electromagnetic Compatibility Tutorial" (Reference: EMCT Module One, Section C, Screens 59/128 through 67/128) the schematic equivalents of this effect are described. Michael **************************************************************************** **************************************************************************** *************** ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu