[windows_errors] [what_error_messages_really_mean_WinXP] I/O Ports Blocked from Bios AML on Windows XP :
- From: "albertj809" <albertj809@xxxxxxxxxxxxxxx>
- To: what_error_messages_really_mean_WinXP@xxxxxxxxxxxxxxx
- Date: Sun, 13 Jul 2003 04:33:54 -0000
I/O Ports Blocked from BIOS AML on Windows XP
Updated: January 16, 2003
=20
On This Page
Introduction=20=20
Changes in Windows XP=20=20
Windows XP BIOS Compatibility Determined Using _OSI=20=20
Windows XP and Legacy BIOS ASL Implementations=20=20
Accessing BIOS Non-volatile Memory (CMOS NVRAM)=20=20
Affected System Resources and Addresses=20=20
Call to Action=20=20
ACPI BIOS implementations that directly access certain system=20
hardware resources from AML code cannot be synchronized with=20
operating system access to the same resources, which can cause the=20
operating system to become unstable or to stop responding. This=20
article describes issues related to BIOS AML firmware accessing=20
system board resources, and the changes implemented to address these=20
issues in the Microsoft=AE Windows=AE XP operating systems and Windows=20
Server 2003.
Introduction=20
During the development of the Windows XP operating system, Microsoft=20
discovered many ACPI BIOS implementations that directly access and=20
attempt to manipulate system hardware resources from BIOS ASL code.=20
At run time, system board resources must not be simultaneously=20
accessed or modified by both the BIOS and the operating system,=20
because these accesses cannot be synchronized with operating system=20
access to the same system resources. As a result, BIOS read or write=20
access to these resources can cause adverse effects, ranging from=20
general instability to causing the system to stop responding.
Historically, error conditions of this nature might have been=20
construed by the operating system as an unrecoverable error,=20
resulting in a stop error (blue screen) and system shutdown. In an=20
effort to improve the end user experience and increase system=20
reliability, Windows XP has been re-designed as described in this=20
article.
Changes in Windows XP=20
While developing and testing Windows XP a list of system board=20
resources was identified that, when accessed from BIOS AML code,=20
proved to be the most problematic. This article refers to the list=20
of addresses associated with these resources as the "blocked ports=20
list." Table 1 lists affected system resources and their associated=20
I/O addresses.
The ACPI AML interpreter in the Windows XP kernel monitors all=20
attempts by BIOS AML code to read from or write to the specific=20
addresses on the blocked ports list. When a read or write access is=20
detected at any of these addresses, the following actions will=20
occur:=20
=95 An error will be added to the system event log stating that the=20
ACPI AML interpreter has detected an illegal read or write, and that=20
this read or write has been blocked.
=20
=95 For BIOS AML code that indicates compatibility with the Windows XP=20
ACPI implementation, the operating system will block all read and=20
write accesses to these addresses. This compatibility is determined=20
by the AML code calling the _OSI method, as described later in this=20
article.
=20
=95 For BIOS AML code that is compatible with versions of Windows=20
released before Windows XP, the operating system will allow the read=20
or write access to succeed in most cases, but will still add an=20
error to the system event log.=20
=20
=95 Accesses to the Programmable Interrupt Controller (PIC) and=20
cascaded PIC, and to PIC Edge/Level Control Registers, are always=20
blocked because BIOS access to these ports is potentially=20
catastrophic and might prevent the system from running. These I/O=20
addresses are noted in Table 1.
=20
Windows XP BIOS Compatibility Determined Using _OSI=20
The specific actions taken by the operating system when read or=20
write accesses to these resources are detected depends on the=20
version of ACPI interface that the BIOS indicates it supports. This=20
is determined through the BIOS use of the _OSI method as described=20
in this article.=20
For complete details about the _OSI method, see How to Identify=20
Windows Versions in ACPI Using _OSI.
The _OSI method is being introduced with the Windows XP operating=20
system. BIOS ASL code can test for the level of features supported=20
in the current Windows operating system by passing a string to the=20
_OSI method. The operating system returns TRUE for any string that=20
represents a feature set that it can support. Windows XP, for=20
example, returns TRUE for the string "Windows 2001".
By passing the string "Windows 2001" into the _OSI method, the BIOS=20
indicates to the operating system that the BIOS is aware of and=20
compatible with the ACPI implementation and feature set of Windows=20
XP. Windows XP will then reject all I/O reads or writes from BIOS=20
ASL code to addresses on the blocked ports list and generate an=20
error in the system event log.
Windows XP and Legacy BIOS ASL Implementations=20
For those BIOS implementations that are compatible with versions of=20
Windows released before Windows XP, the operating system will allow=20
the read or write access to succeed in most cases. Accesses to the=20
PIC and cascaded PIC, and to the PIC Edge/Level Control Registers,=20
are always blocked. In all cases an error will be written to the=20
system event log.=20
To help ensure system stability on systems with legacy BIOS ASL=20
implementations, Windows XP attempts to synchronize accesses to=20
resources whenever possible. For example:=20
=95 When a read or write access is detected to the CMOS/RTC index and=20
data pair registers at I/O addresses 0x70 and 0x71, the operating=20
system does the following:=20
=95 Disables interrupts
=20
=95 Preserves the contents of the index (address) register
=20
=95 Allows the ASL code access to proceed
=20
=95 Restores the value of the index register
=20
This process helps prevent a race condition in which the operating=20
system writes the desired address to the index register and a BIOS=20
method changes the address in the index register before the=20
operating system can access the intended data register, causing the=20
operating system to use the wrong index value.=20
Note: This approach cannot guarantee that the CMOS address register=20
(0x70) will not be corrupted on multi-processor systems.=20
=20
=95 ASL code that attempts to access the PCI Configuration Space=20
registers at 0xCF8 0xD00 is re-routed by the kernel AML interpreter=20
to call HalGetBusDataByOffset, which allows access to system=20
resources to be properly synchronized.
Accessing BIOS Non-volatile Memory (CMOS NVRAM)=20
With these changes in Windows XP, BIOS developers may be looking for=20
alternative methods to access CMOS NVRAM. The following examples=20
present some possible solutions.
Reading from CMOS NVRAM
This example ASL code defines an operation region in the system=20
memory address space. During POST, BIOS code copies the data from=20
CMOS to this memory area. ASL code can then use fields to read the=20
CMOS data.=20
Each CMnn field in the example corresponds to 8 bits of CMOS. The=20
BIOS engineer is responsible for defining these fields=20
appropriately. Each field of this memory can be any combination of=20
bits.=20
During system boot, BIOS POST code should update this memory area=20
with the value written in the CMOS before handing off to the=20
operating system. Once the operating system has switched to ACPI=20
mode, any attempt to read CMOS from ASL code should be done by=20
reading from these memory locations and not from CMOS NVRAM I/O=20
ports.=20
// Declare a memory operation region for 255 bytes of CMOS.=20
// First 0 to 127 bytes reflects CMOS access from IO ports 0x70=20
// and 0x71 and the subsequent bytes reflect CMOS access from IO=20
// ports 0x72 to 0x73. BIOS code should properly set up the base=20
// address of the beginning of this memory range at offset during=20
// BIOS POST.
OperationRegion (CMRM, SystemMemory, offset, 255) //Operation=20
Region=20
Field (CMRM, AnyAcc, NoLock, Preserve) { //Field
// Memory corresponding to addresses 0x70, 0x71
CM00, 8,
CM01, 8,
CM02, 8,
.
.
CM7f, 8,=20=20=20=20=20
// Memory corresponding to addresses 0x72, 0x73
CM80, 8,
.
.
CMFF
} // End of CMOS field
The following is an example of ASL code which reads from CMOS offset=20
52 bits 4 to 7 and returns the value read.=20
// This example returns bits 4 to 7 of CMOS offset 52
Method (RDCM) {
ShiftRight (CM52, 4, Local0)
Return (Local0)=20
}
Writing to CMOS NVRAM
BIOS code should write to CMOS NVRAM by generating a system=20
management interrupt (SMI). AML code can generate a SMI by writing a=20
specific value to the SMI command port. AML code can pass the CMOS=20
offset and value to be written through the NVRAM memory operation=20
region. The BIOS SMI handles the writes to CMOS, and also updates=20
the memory area pointed by the CMRM operation region to reflect the=20
correct CMOS contents.
Affected System Resources and Addresses=20
Table 1 lists the system resources and associated I/O addresses that=20
should not be directly accessed by BIOS AML code (the "blocked=20
ports" list).
Table 1 Blocked I/O Port Addresses and System Board Resources=20
Address Function Comments=20
0x000 0x00F
DMA Controller 1
=20
0x020 0x021
Programmable Interrupt Controller
Access is never allowed*
=20
0x040 0x043
System Timer 1
=20
0x048 0x04B
Timer 2 Failsafe
=20
0x070 0x071
System CMOS, RTC
=20
0x074 0x076
Extended CMOS
=20
0x081 0x083
DMA1 Page Registers
=20
0x087
DMA1 CH0 Low Page
=20
0x089
DMA2 CH2 Low Page
=20
0x08A 0x08B
DMA2 CH3 Low Page,
=20
0x08F
DMA2 Low Page Refresh
=20
0x090 0x091
Arbitration Control Port Card Select Feedback
=20
0x093 0x094
Reserved System Board Setup
=20
0x096 0x097
POS Channel Select
=20
0x0A0 0x0A1
Cascaded Programmable Interrupt Controller
Access is never allowed*
=20
0x0C0 0x0DF
ISA DMA
=20
0x4D0 0x4D1
PIC Edge/Level Control Registers
Access is never allowed*
=20
0xCF8 0xD00
PCI Configuration Space Access
*Read or write accesses to these ports are always blocked,=20
regardless of the BIOS use of the _OSI method.
Call to Action=20
BIOS developers should design their BIOS code according to the=20
guidelines in this article:=20
=95 BIOS code that is compatible with Windows XP should access system=20
resources as described in this article; they should not directly=20
read from or write to any of the I/O port addresses listed in Table=20
1.
=20
=95 BIOS code that is compatible with earlier versions of Windows=20
released before Windows XP should not directly access the PIC and=20
cascaded PIC, or PIC Edge/Level Control Registers.
=20
=95 BIOS code should report compatibility with Windows XP as described=20
in How to Identify Windows Versions in ACPI Using _OSI.
=20
For information about power management and Windows, see:=20
http://www.microsoft.com/whdc/hwdev/tech/onnow/default.mspx
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