[SI-LIST] Voltage level shifter for differential signals
- From: S A <shahbaz_assad@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 18 Jul 2011 10:39:08 +0000
Hi All,
I am sorry if my questions annoyed you as it is related to basic theory .
1. I have seen that 2.5V differential clock was fed to an FPGA bank having 1.8V
IO voltage with AC coupling Caps.
2. Can we connect 2.5V differential signal directly with FPGA IOs having 1.8V
VCCIO.
Can you please explain why there is no need of Voltage level translators for
differential signals.Kindly correct me if my question is incorrect.
Thanks in advance
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