[SI-LIST] Re: Splitting this power plane - And GND planes count
- From: Ivor Bowden <ivor@xxxxxxxxxxx>
- To: chris.mcgrath@xxxxxxxx
- Date: Mon, 14 Mar 2005 11:46:12 -0800
Chris, yes exactly. Both component layers are mostly just fan out and
short runs. The most critical nets (LVDS, etc.) are buried in the center
stripline area. I'll report back once I get the board running.
Appreciate all the comments / advice!
Ivor
on 3/14/2005 11:35 AM Chris McGrath wrote:
>Ivor,
>
>I think that avoiding signals on the top layer (outside of very short
>runs such as breakouts from the IC's) and a good decoupling streategy
>would also help shore up the design.
>
>I, for one, would be interested in hearing the ending to this story when
>you get hardware in the lab.
>
>Thanks,
>Chris
>
>
>
>
>>-----Original Message-----
>>From: si-list-bounce@xxxxxxxxxxxxx=20
>>[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Ivor Bowden
>>Sent: Monday, March 14, 2005 1:40 PM
>>To: alan@xxxxxxxxxxxxxxxxx
>>Cc: weirsi@xxxxxxxxxx; gil.gafni@xxxxxxxx; si-list@xxxxxxxxxxxxx
>>Subject: [SI-LIST] Re: Splitting this power plane - And GND=20
>>planes count
>>=20
>>=20
>>I appreciate the comments! We do have various constraints to=20
>>work with of course, but recognize the original stackup could=20
>>be improved. Currently I are looking at:
>>=20
>>1) component / signal
>>2) split power plane
>>3) signal
>>4) ground plane
>>5) signal
>>6) signal
>>7) ground plane
>>8) signal
>>9) split power plane
>>10) component / signal
>>=20
>>This way signals are either asymmetrical stripline, or=20
>>stripline (albeit depending on split plane bypassing) or=20
>>microstrip (also depending on split plane bypassing). Unused=20
>>areas of the signal layers will be copper flooded with=20
>>ground, except the asymmetrical stripline.
>>=20
>>I know that is not optimal either, of course, but I have time=20
>>and budget constraints and the product needs to be built..
>>=20
>>Ivor
>>=20
>>on 3/11/2005 8:09 PM Alan Hilton-Nickel wrote:
>>=20
>>
>>
>>>steve weir wrote:
>>>
>>>
>>>
>>>>1) Why three big power planes if they do not form cavities=20
>>>>
>>>>
>>with logic=20
>>
>>
>>>>ground? If this is a DC problem then apply a DC solution.
>>>>
>>>>
>>>>
>>>And from the DC perspective, if 3 planes are needed on the=20
>>>
>>>
>>supply side=20
>>
>>
>>>to provide sufficient current, then three ground planes=20
>>>
>>>
>>would also be=20
>>
>>
>>>needed to complete the circuit.
>>>
>>>Nasty stackup indeed.
>>>
>>>Ivor, you need two more layers. May I suggest (depending on your=20
>>>signals of course):
>>>
>>>1. Component/signal
>>>2. Ground
>>>3. Power
>>>4. Signal
>>>5. Signal
>>>6. Power
>>>7. Ground
>>>8. Signal
>>>9. Signal
>>>10. Power
>>>11. Ground
>>>12. Component/Signal
>>>
>>>Alan
>>>
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