hello Jimmy, The simulation setup you suggest shorts the top and bottom planes with what is essentially a stitching via. It may be inappropriate because there is no stitching via present in the physical design. If both top and bottom planes are part of the same net (single-reference) one can argue this may not be too bad, but it is still different than the real design. Even if there are stitching vias nearby one should model the interaction of the trace with the stitching vias and not just reference one of them for a return path. If the top and bottom planes are not part of the same net (dual-reference) then this short of the two planes is very inappropriate, especially at/near DC or at high frequencies where resonances or power plane impedance effects may influence the design. What you propose will yield an SI approximation to the behavior of the trace, but it does not represent the PI effects properly. To simulate the design properly one must add a "fixture" in the simulation exactly as one would do physically to measure the trace. There will be a feedline and some connector to the simulation (or measurement) ports. A pair of Gnd-Signal pads or a coax connector will provide a well-defined return path. For an accurate simulation of how the device will behave when embedded in the circuit you should make your simulation/measurement port return path match closely with how the signal in the design will be excited. This may seem a subtle or nit-picky issue, but I have seen many applications over the years (and even conference papers) that have applied excitations improperly. Some of these cases distort the results significantly because PI (return path) issues are the goal of the simulation. Changing to wave ports can potentially help, but not the way most people would define wave ports. To get a proper simulation you will need to have wave ports with PMC (perfect magnetic conductor) side walls, where the default is PEC. When you use PMC sidewalls there will be two modes - a stripline and a parallel plate mode. Each port will need to have these two modes present. To further complicate things, these modes are degenerate (same propagation constant), or nearly so even with non-zero trace thickness, metal and dielectric loss included. The port solver will indeterministically mix these two modes. If I recall properly you will need to "polarize" the two modes; maybe I have the word wrong. All of this complexity is on top of the fact that you still may need to remove your port some distance from the circuit you are trying to simulate/measure to avoid influencing the device with the port. You can get an approximation, sometimes a good approximation, to the device behavior with the port configuration you suggest. However, one should always keep the physical analogy in mind to what they are doing with the port setup. If it is okay to short your planes together to make a measurement immediately at the edge of the circuit under test, then your simulation setup is fine. If it is not okay from DC to high frequency to short the planes together then the setup you suggested is not appropriate. Defining ports in a 3D EM solver is the most challenging task for users. Always keep in mind the physical/measurement analogy of whatever you do in the simulation and you will be aware of the approximations you are making. cheers, -Brad > -----Original Message----- > From: si-list-bounce@xxxxxxxxxxxxx > [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Jimmy Lee > Sent: Thursday, August 11, 2011 4:05 AM > To: Jagan Rajagopalan; Ken Cantrell > Cc: Tesla; si-list@xxxxxxxxxxxxx > Subject: [SI-LIST] 答复: [SI-LIST] Re: HOW assign lumped port > in HFSS for stripline > > HI, > 1,Draw one rectangle which contact to the edge of the top and > bottom plane 2,draw one rectangle which has the same size > with the transmission lines. > 3,Use the substract function to cut the center rectangle away. > 4, set excitation > ... > ------------------------------------------------------------ > | | > | | > | | > | |-------------------------| | > | | Line | | > | |-------------------------| | > | | > | | > | | > | | > ---------------------------------------------------------------- > -----邮件原件----- > 发件人: si-list-bounce@xxxxxxxxxxxxx > [mailto:si-list-bounce@xxxxxxxxxxxxx] 代表 Jagan Rajagopalan > 发送时间: 2011年8月9日 23:30 > 收件人: Ken Cantrell > 抄送: Tesla; si-list@xxxxxxxxxxxxx > 主题: [SI-LIST] Re: HOW assign lumped port in HFSS for stripline > > Hi, > Check the attached tutorial which explains on how to use > lumped ports for different transmission lines. It also shows > on how to extend the line till the model boundary to assign > wave port and de-embed the same for correct excitation. > > Thanks, > Jagan > > On Tue, Aug 9, 2011 at 6:55 AM, Ken Cantrell > <Ken.Cantrell@xxxxxxxxxxxxxxxx>wrote: > > > Contact your Ansoft FAE. > > > > -----Original Message----- > > From: si-list-bounce@xxxxxxxxxxxxx > > [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Tesla > > Sent: Monday, August 08, 2011 8:57 PM > > To: si-list@xxxxxxxxxxxxx > > Subject: [SI-LIST] HOW assign lumped port in HFSS for stripline > > > > > > Hi,everybody > > Because the PCB line i will simulate located internally, so > i can not > > use the Wave Port of HFSS. > > I konw for a microstrip line, i can draw the 2D port rectangle that > > touchs the signal with one edge and the opposite edge touch the > > reference ground plane. > > but for the stripline, there are two reference plane.how do > i draw the > > rectangle. > > thanks. > > ------------------------------------------------------------------ ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu