Hi All,
I was trying to measure BER contour (Eye) inside PCIe2 Rx after CTLE-CDR,
not on RX pins.
I see that i am getting eye height of 250mV & eye width of 64ps inside the
Rx pad using internal eye measurement circuit.
I was going through PCIe2 spec, i see that spec defines 120mV & 0.4 UI i.e.
80ps at Rx pins, but not inside Rx after CTLE, CDR.
I am unable to run Jitter tolerance test on PCIe2 Rx as Root complex and
End point are on the same board soldered down (not motherboard-Add-in card).
PCIe3 CEM spec defines 46mV & 41ps after DFE. Is there similar spec for
PCIe2 Rx.
Regards
Vinod A H
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