[SI-LIST] Re: RF Layout - Via spacing
- From: wolfgang.maichen@xxxxxxxxxxxx
- To: arvind yadav <arvind.yad1983@xxxxxxxxx>
- Date: Thu, 22 Oct 2009 10:04:14 -0700
Hello Arvind,
the goal in designing a clean (reflection-free) signal path is to have
homogeneous characteristic impedance all along the path (typically ZoP
Ohm unless you are working with TV signals that use 75 Ohms).
The characteristic impedance is determined by the ratio of inductance Lu
per unit length and capacitance Cu per unit length:
Zo=sqrt(Lu/Cu)
A signal via and its closest return via (or vias) are just part of that
path. Changing the distance d between signal and return via changes both
capacitance C and inductance of that via structure (C decreases with d,
and L increases with D), so you can use that to tune the impedance of the
via structure. Ideally you'll achieve 50 Ohms although this is hard to do
with just a single return via. In that ideal case (ZoP Ohms) the via
structure becomes completely transparent to the signal, i.e. it only
causes delay (delta_t = sqrt(C x L)) but no reflections.
Designing a well-matched via structure is a challenge and typically need
either a good 3D simulation tool or a few test boards to get it right at
high data rates. Rules of thumb ar hardly sufficient although they can
provide at least a goot starting point as well as show the "knobs" you can
use to adjust the impedance (for via structure, there a are many knobs -
via diameter and distance, stub or stub drilling, pad/antipad diamaters,
and so on).
The lambda/20 rule you mention comes from the fact that typically
structures that are very short against the shorted wavelength (highest
frequency) of interest only have negligible influence on the waveform,
i.e. produce only minimal reflections even when they are mismatched (Zo <>
50 Ohms). This is of course just a crude rule of thumb.
Whatthe lambda/20 rule achieves very nicely is that it forces you to place
a return via close to every signal via. This is important - current is
always flowing in a loop so if there is no return via close by, the return
current has to "go looking" for the nearest return path which may be quite
a detour - this will cause a large parasitic inductance in the path
(because the current now encloses a large loop are) and resulting large
reflection and reduced bandwidth.
Wolfgang
arvind yadav <arvind.yad1983@xxxxxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
10/22/2009 09:45 AM
To
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Subject
[SI-LIST] RF Layout - Via spacing
Hello All,
I am working on a RF Layout. I looked into some design guidelines and had
some doubt on gnd via spacing requirement .
Guideline said that ë/20 distance has to be maintained between gnd vias
that
are stitched on either side of the RF signal
Can any one please let me know the reason for this requirement ?
I also would like to know what would be the gnd backoff distance from the
RF signal and the reason .
Thanks
Arvind.H
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