# [SI-LIST] Re: Power dissipated in a chip

• From: "Orin Laney" <olaney@xxxxxxxxx>
• To: "'Amit KUMAR STE'" <amit.kumar@xxxxxxxxxxxxxx>, <si-list-request@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
• Date: Fri, 5 Aug 2011 05:08:50 -0700

```Your formula is for instantaneous stored energy in a capacitor, not power.
Power is the time rate of energy flow, which requires integration to solve
for.  This results in disappearance of the factor of 1/2 and an answer that
involves V rather than V^2.  When Eric's formula divides the V^2 in the
numerator by P (= VI), that is what you get.

Orin

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Amit KUMAR STE
Sent: Friday, August 05, 2011 3:44 AM
To: si-list-request@xxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Power dissipated in a chip

Hello Experts ,
Sorry if I sound naïve. According to Eric Bogatin's SI book , the time until
the voltage droop increases to 5% of the supply voltage , because of the
decoupling capacitance is :

t=(C*0.05*(V^2))/P

where P is the average power dissipation of the chip.
C is the decoupling capacitance between the power plane and
ground plane.
How do we get this forumula for the time taken in voltage droop?

The power forumula I know is P=1/2 CV^2 . Please give me some reference from
where I can understand this .

Thanks and Regards
Amit

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