[SI-LIST] Re: Potting/encapsulation/conformal coating and SI
- From: Ray Anderson <reanderson@xxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 04 Oct 2004 15:01:19 -0700
The original post was inquiring about the use of conformal coating
and/or potting on high-speed boards. Since the Er of the coating
material is >1 (air) the resulting impedance of the coated lines will be
lower than the same uncoated lines. The effect is most easily evaluated
with a field solver.
The exact Er of the coating material and the thickness of the coating
will determine how much the line impedance is changed.
An example:
Surface Microstrip:
6 mil conductor width, 8 mil Er=4.2 dielectric, 1.2 mil thick conductor
==> Z ~ 73.2 ohms
Coated Microstrip:
Same stackup but include 2 mils of Er 4.2 coating on top of the trace
==> Z~ 66.2 ohms
Moral of the story:
Be sure to evaluate what the coating will do to the impedance of your
PCB traces. If you intend to coat the board, design to account for that
effect. Adding conformal coating to a properly operating board _may_
cause improper operation of the circuitry if you are depending on a
particular impedance.
-Ray Anderson
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