[SI-LIST] Re: Planes under oscillator parts

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: Bryan Ackerly <backerly@xxxxxxxxxxxxxx>
  • Date: Wed, 01 Jun 2011 02:52:29 -0700

What you want to avoid is excess capacitance that will throw off the 
oscillator or even prevent it from starting up properly.  To that end 
you can use your head to estimate plate capacitance between the traces 
and ground placed on the adjacent layer, or further down in the 
stack-up.  If the parasitic capacitance is less than 5-10% of your load 
capacitor's value, then you are pretty safe putting a ground polygon 
there.  Otherwise leave that area clear.

Yes, if you don't put any ground in it means that the field from that 
little circuit will radiate more efficiently.  The power level is 
extremely low, so this is usually not an issue.  It depends on what the 
rest of your packaging looks like.  If you have wires coming out of your 
box, then likely you need to concern yourself much more with CM noise on 
those wires than what can radiate from the 0.25" sq area or less that a 
crystal and two capacitors take up.

Steve.
On 5/31/2011 10:05 PM, Bryan Ackerly wrote:
> I was looking at a data sheet for a Renesas R78 processor today and it 
> indicated that the area under the oscillator crystal and load capacitors 
> should be completely devoid of power or ground planes.
>
> I understand that there could be an issue with modeling load capacitance from 
> a plane but otherwise I would have thought this was rather bad advice from an 
> EMC perspective.
>
> Has anyone else heard of doing this? Is it based on any particular solid 
> reasoning?
>
> --------------
> Bryan Ackerly.
> Schneider Electric
>
>>>
>>>
>>>
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Steve Weir
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