[SI-LIST] Re: How to simulate the signal going into connector
- From: steve weir <weirsi@xxxxxxxxxx>
- To: Shahbaz Assad <shahbaz_assad@xxxxxxxxxxx>
- Date: Mon, 21 Jun 2010 05:10:20 -0700
How accurate an answer do you need? If you make gross assumptions, you
will likely end up with gross errors. If you want answers that have
some relationship to reality then you need to assemble a model of your
channel that includes the packaged silicon, the PCB, and the
connector(s). You should model using I/O models from at least one of
the FPGAs that you are considering, and the memory components. If you
have a great deal of experience with the prospective components then you
may be able to cheat on iterative testing based on common
characteristics between the alternative components.
Steve.
Shahbaz Assad wrote:
> Hi Experts,
>
> I want to simulate some DDR2 signal that are going into the mating
> connector. The DDR2 is on the daughter card and it has to interface with the
> FPGA.
> Now please tell me how to simulate the DDR2 signals on the connector pins. I
> dont know what FPGA we are using on main board. I want to see my signal on
> the connector only.
>
> Tell me what is the best way to study the case?
>
> -shahbaz
>
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Steve Weir
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