[SI-LIST] Re: How to define Min Size Inverter
- From: Fabrizio Zanella <Fabrizio.Zanella@xxxxxxx>
- To: knavaram@xxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 29 May 2008 17:07:11 +0200
Hello K=2E Navaram, please be aware that the SI List is for signal
integrity, EMI/EMC problems, not semiconductor design=2E
Cheers,
Fabrizio Zanella
Support Manager
CST of America
-----Original Message-----
From: knavaram@gmail=2Ecom [mailto:knavaram@gmail=2Ecom]
Sent: Wednesday, May 28, 2008 1:32 AM
To: si-list@freelists=2Eorg
Subject: [SI-LIST] How to define Min Size Inverter
Hi all,
How to define min size inverter=2E Is it taking min NMOS and increasing
the of
PMOS to get the same rise ,fall time
OR simply taking min size NMOS and PMOS
Thanks & Regards
K=2ENavaram Kumar
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