[SI-LIST] Highlights of the IEEE EMC Society 2007 International Symposium for the Signal Integrity Community
- From: Roy Leventhal <Roy.Leventhal@xxxxxxxx>
- To: si-list <si-list@xxxxxxxxxxxxx>
- Date: Thu, 26 Jul 2007 13:13:19 -0500
From July 8-13, 2007, the IEEE Electromagnetic Compatibility Society
held its annual international symposium in Hawaii, marking its 50^th
anniversary. Roy Leventhal, who was an interested observer with no
official IEEE function, prepared this report for the IBIS and Signal
Integrity communities. Jim Nadolny, chair of SI Technical Committee
(TC10) for 2005-2007 reviewed the report. To learn more about the IEEE
EMC Society, see: http://www.ewh.ieee.org/soc/emcs/.
Summary
At the past few symposiums, there has been a dramatic increase in the
interest shown in signal integrity (SI), power integrity (PI), modeling,
and simulation. While at this year's symposium, I was pleased that most
attendees were future-focused and up-to-date on IBIS modeling and signal
integrity.
Computational electromagnetics (CEM) has always received a lot of
attention. Today, through modeling and simulation, CEM is being
vigorously applied to electromagnetic interference, integrity, and
control (EMI/EMC). Many CEM and EMI/EMC papers presented at the
symposium addressed SI/PI issues. The attendees recognize that EMI/EMC
issues usually start because of SI/PI issues and design actions. One
example of the overlap occurs when the output drive current's high
frequency content is increased from a programmable strength IC. An SI
engineer may take this action to compensate for high frequency losses in
multi-gigabit nets. Then the EMI/EMC engineer may take an action that
directly impacts what an SI engineer may need to accomplish. For
example, a large-valued resistor can be used to limit I/O driver
current. This action reduces EMI, but it can interfere with source
termination matching and signal integrity.
Everyone I spoke with at the symposium agreed that design challenges in
timing, SI, PI, and EMI/EMC are multidisciplinary in nature. That is,
they felt that in any given design, engineers must take every discipline
into account and solve design issues concurrently. Further, those who
have traditionally done only test and measurement increasingly believe
that modeling and simulation is now very important.
Two Examples of Information Presented at EMC2007
An Intel IC Paper
"Comparison of Radiation from Two Microprocessor Test Packages," written
by Xiaopeng Dong, Kevin Daniel, and Kevin Slattery, Intel Corporation
©2007 IEEE EMC Society Xiaopeng.dong@xxxxxxxxx
<mailto:Xiaopeng.dong@xxxxxxxxx>, Kevin.j.daniel@xxxxxxxxx
<mailto:Kevin.j.daniel@xxxxxxxxx>, Kevin.p.slattery@xxxxxxxxx
<mailto:Kevin.p.slattery@xxxxxxxxx>
This paper compared the radiation from two package types with the same
microprocessor. One package featured a microstrip power supply plane and
the other package featured a stripline (continuous) power supply plane.
Radiation at 2GHz was significantly enhanced from the stripline
configuration, because this arrangement created a resonant cavity at
2GHz! There was good agreement between measurements and simulation.
Further, it is possible that the continuous supply plane may behave as a
patch antenna elevated from the IC/board return planes. Secondly, the
vias from the microstrip arrangement through the volume that formed the
resonant cavity are a common microwave engineering technique.
Lastly, there was a discussion of whether silicon chips radiate
directly; there was a consensus that it probably did not. But the chip
signal and power ports (pads) are a likely source of /conducted/
emissions, which can be radiated by the physically much larger package
and PC board mounting.
/RL comment: By the year 2013, silicon technology roadmaps call for 30
nm processes and 25GHz core switching rates. 25GHz is in the K band
radar range. When dealing with such chips, engineers will need to design
for a frequency range of DC to 80GHz. Meanwhile silicon chips are
growing larger as more functionality gets packed onto them. So the
potential for direct radiation off the silicon exists in the not too
distant future. /
A New Power Integrity Book
Prof. Madhavan Swaminathan and Dr. Ege Engin presented papers previewing
some of the subjects covered in their forthcoming new book: /Power
Integrity Modeling and Design for Semiconductors and Systems/, M.
Swaminathan and E. Engin, Prentice Hall available 12/2007, ISBN:
0-136-15206-6. http://www.prenhallprofessional.com/title/0136152066
The book provides a collection of data from 10 years of research at the
Georgia Institute of Technologies Packaging Research Center. The book
starts with the basic concepts of power delivery design and delves into
the modeling of planes, simultaneous switching noise, time domain
simulation methods and several applications. Using several examples, the
various modeling techniques are illustrated. The book also provides a
software package for modeling power integrity.
For further information, please contact Dr. Ege Engin:
engin@xxxxxxxxxxxxxx <mailto:engin@xxxxxxxxxxxxxx>
Feature Selective Validation (FSV)
Introduction
FSV is a recently developed mathematical method of comparing two data
sets (measurement-measurement, measurement-simulation,
simulation-simulation). FSV provides measures of correlation goodness.
In addition, the mathematical method is correlated with the subjective
visual-graphical judgments of experienced observers classified though a
decision tree. FSV offers sufficient granularity and precision to put
data correlation on a much greater accuracy footing for all of
engineering and science.
FSV was developed by EMI/EMC engineers for correlating waveform
spectrums, S-parameters, etc. It is immediately applicable to time
domain waveform correlations as well as other data sets. A standard,
P1597 (see next topic) is being developed by an IEEE EMC Society
sub-committee that applies the FSV method to areas of particular concern
to EMI/EMC.
FSV can be combined with the methods of statistical significance when we
have to account for the natural variance of a population of manufactured
units. David Banas presented a shortened version on FSV and statistical
methodologies at the last IBIS Summit Meeting.
· The shortened presentation can be downloaded from:
http://www.vhdl.org/pub/ibis/summits/jun07/leventhal.pdf
· The full presentation can be downloaded from:
http://www.semiconductorsimulation.com/Verification%20of%20Simulation%20Results.pdf
P1597 "Standard for Validation of Computational Electromagnetics
Computer Modeling and Simulation"
The P1597.1®D4.2 Draft is currently out for balloting by the IEEE EMC
Society sub-committee members. The members are currently developing a
Draft P1597.2® "Recommended Practice for Validation of Computational
Electromagnetics Computer Modeling and Simulation."
When the EIA IBIS Open Forum is ready to deal with the issue of model
accuracy and verification, it should be able to benefit from the
pioneering work being done in FSV and the P1597 standard by the IEEE EMC
Society.
Technical Committee 10 on Signal Integrity
Responsibilities of Technical Committee 10 on Signal Integrity (TC10)
Technical committees in the IEEE EMC Society set direction and scope for
the tutorials, workshops, technical paper sessions, poster sessions,
tabletop measurement demonstrations, and simulation demonstrations. They
solicit, review, referee, and approve the above, as well as request
facilities and equipment in conjunction with local chapters and the IEEE
Society. During the annual symposium, they meet in person. During the
rest of the year, most of their business is conducted by email and
telephone.
Report on IBIS to TC10
At the symposium, I presented a report (/not in an official capacity)/
on current IBIS committee activities to TC10. The report received prior
review by Michael Mirmak, Arpad Muranyi, Bob Ross, and Mike LaBonte. The
report made the EMI/EMC community aware of EIA IBIS Open Forum
activities in S-Parameters (Touchstone 2.0), Advanced Technology
Modeling (VHDL-AMS, BER and jitter, etc.), IBIS Quality Spec Review,
IBIS interest in "3S," and FSV/model accuracy. The EMI/EMC community
now understands that there is much more to IBIS than I-V and V-T model
data tables.
The committee members see themselves as directly benefiting from 3S --
the possibility of an IBIS-like standard for SPICE -- plus the efforts
in BER and jitter measurement standards.
Touchstone 2.0 seems to me to be moving forward faster than ICEM
62014-3, "Electromagnetic Compatibility Part 3 Integrated Circuits
Electrical Modeling," being developed by the International
Electrotechnical Commission (IEC). I raised the possibility of
Touchstone 2.0 and an equivalent current source embedded in the IC (an
idea borrowed from 62014-3) being applied to PI problems.
The full report about IBIS to the TC10 committee can be viewed at:
http://www.eda.org/ibis/docs/IBISReportJuly2007.pdf
Reaction to Report
The TC10 committee was very interested and supportive of the work of the
IBIS Committee. Several members wondered "How can we get the silicon
guys (also meaning PCB engineers and EDA software companies) more
involved in our (IEEE EMC Society) activities?" I believe the TC10
committee will follow up on this idea.
Officers of TC10
Current officers of TC10 are:
Chair 2007
Antonio Orlandi
orlandi@xxxxxxxxxxxxx
Univ. Of L'Aquila
Vice-Chair 2007
Giulio Antonini
antonini@xxxxxxxxxxxxx <mailto:antonini@xxxxxxxxxxxxx>
Univ. Of L'Aquila
Secretary 2007
Xiaoning Ye
xiaoninq.ye@xxxxxxxxx <mailto:xiaoninq.ye@xxxxxxxxx>
Intel
Papers and Sessions
Level of SI/PI activity
Ten half-day tutorials were presented. Four were of general EMI/EMC
interest, and one was a tutorial, "Limitations of Simulation
Technologies and Proper Model Validation For Both Signal Integrity and
EMI/EMC." This tutorial was of specific SI/PI interest.
Fifty half-day technical papers sessions oriented to the latest
developments were presented. Twenty sessions were of general EMI/EMC
interest to PCB engineers and an additional twelve were of specific
SI/PI interest.
The sessions of particular interest to SI/PI were:
* Design and Modeling Methods For Power Integrity
* Electromagnetic Bandgap Structures For EMI/EMC Applications
* Electromagnetic Bandgap Structures
* Signal Integrity I, II, and III
* Poster Session 01: PCB and IC EMC
* Special Session: Power Integrity / Signal Integrity For Next
Generation Systems
* Printed Circuit Board EMC I
* Integrated Circuit EMC
* Electronic Packaging EMC and Signal Integrity
* Printed Circuit Board Modeling
High Interest Papers About SI/PI
Over 30 papers out of about 240 presented at EMC2007 may be of
particular interest to the SI/PI community. Probably another 45 papers
were of related interest to the SI/PI community. Some of particular
interest were:
* /Signal and Power Integrity Co-Simulation for Multi-layered System
on Package Modules/.
* /Concurrent Analysis of Signal-Power Integrity and EMC for
High-Speed Signaling Systems/.
* /Circuit Board Layout for Automotive Electronics./
* / Signal Integrity Analysis of a 1.5 Gbit/s LVDS Video Link. /
* /Noise Isolation Modeling and Experimental Validation of Power
Distribution Network in Chip-Package. ///
* /Implementation of On-Chip and On-Package Reactive Equalizer to
Minimize Inter-symbol Interference (ISI) and Jitter from Frequency
Dependent Attenuation./
* /Experimental evaluation of isolation effect on printed circuit
board with gapped power plane./
* /EMC of Integrated Circuits: A Historical Review./*//*
* /Load Current Funneling Examination for Power Distribution in High
Performance Multi-core Silicon./
* /Multi-Gigabit I/O Link Circuit Design Challenges and Techniques./*//*
* /Power and Ground Bounce Effects on Component Performance Based on
Printed Circuit Board Edge Termination Methodologies./
* /Modeling & Measurement of Mutual Coupling Resulting from Via
Structures within Printed Circuit Boards./
* /Multimodal Analysis of Guard Traces. ///
* /Comparison of Radiation from Two Microprocessor Test Packages.///
* /Numerical and Experimental Investigation of Power Supply Noise
Decoupling Strategies on Single-Sided Printed Circuit Boards./
* /Modeling of Signal and Power Integrity in System on Package
Applications.///
* /Accurate Characterization of Package and Board Components for
Efficient System Level Signal Integrity Analysis./
CD-ROM of EMC2007
Readers interested in any of the papers presented can order a CD-ROM.
As of this writing, the CD is /not/ yet available.
* To order, go to http://shop.ieee.org/ieeestore/
* To check on availability, go to Customer.service@xxxxxxxx
<mailto:Customer.service@xxxxxxxx> or call 1-800-678-4333
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