[SI-LIST] High speed board design project (6-9 months) in Bay Area, CA

From: "Kevin Pierpoint" <kevin_pierpoint@xxxxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Mon, 11 Dec 2006 16:55:36 -0500

Hello guys. I wanted to see who might be interested and qualified (and
available) for the following project:
 

> This group is designing a networking NIC card. They have two projects 

> in mind. For the 1st project, the schematics are done, so you would be


> responsible for getting the board into production. This is not a new 

> design....I think he said it is in a different form factor? For the 

> 2nd project, the design is done, and you will be responsible for the 

> schematic capture. At a certain point, these two projects will be done


> in parallel.

> 

> Musts:

> - high speed digital board design (at 1 least 1 gig...but up to 10 gig


> would be great)

> - high frequency (minimum 250 mghz)

> - multilayer boards

> - cadence tools (specifically allegro and concept HDL)

> - general understanding of signal integrity

 

> Plus:

> - networking (ethernet would be a huge plus)

> - PCI express

> - Thermal analysis and EMI experience

 

This is supposed to be a 6-9 month project.

 

Please contact me directly (see below).


Regards,

 

 
Kevin D. Pierpoint
Branch Manager/Technical Recruiter
Oxford & Associates, Inc.
(408) 245-3915 x111
 

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[SI-LIST] High speed board design project (6-9 months) in Bay Area, CA

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