[SI-LIST] Free Agilent SI Seminars - München Germany June 21 - Böblingen Germany June 22 - Massy France June 23 - Winnersh UK June 24
- From: <colin_warwick@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 1 Jun 2010 08:59:56 -0600
Hi,
I'm presenting one of the papers in a series of free Agilent SI seminars in
Europe, details below. Hope to see you there, but if you can't get to one of
the live events, an on-demand webcast version is posted here:
http://signal-integrity.tm.agilent.com/wp-content/uploads/2010/06/measure/measure.html
It includes a refresher on Maxwell's equations and field solvers that I'm
hoping will give you an 'A ha!' moment or two. As always, I welcome your
feedback.
Best regards,
-- Colin Warwick
Signal Integrity Design Flow Manager, Agilent EEsof EDA
Blog: http://signal-integrity.tm.agilent.com
List of registration pages by country
Long link
http://www.home.agilent.com/agilent/redirector.jspx?action=ref&cname=AGILENT_EVENT&ckey=1842597&cc=US&lc=eng&cmpid=29280
Shortened link
http://bit.ly/cdF5wV
21 June München Germany
22 June Böblingen Germany
23 June Massy France
24 June Winnersh UK
Agenda (typical: check local listing)
0900-0915 Registration
0915-0930 Welcome
0930-1030 Signal Integrity Basics and Measurement Solutions
Abstract
There are 3 trends that impact every digital designer today:
1) Higher data rates make more challenging designs and with that comes SI issues
2) FPGAs offering high-speed I/Os, SERDES, and more capabilities making
accurate system simulation more difficult
3) New digital standards are introduced or evolve every 2 or 3 years with data
rates doubling, problems usually quadruple
At fast edge rates electrical interconnects can cause distortions to the
signals coming out of a driver. If there is an impedance mismatch between the
PCB trace and the receiver a ringing is seen in the receiver. This 'ringing'
can cause significant problems in the performance of the circuit. Signal
Integrity Engineering is about quickly finding the cause of these problems and
fixing them intelligently, hopefully before a physical prototype is built.
Signal Integrity is all about paying attention to RF effects, which means
impedance. Better anticipating these will provide a more robust design.
This presentation is a detailed technical tutorial on the different aspects of
Signal Integrity, with examples of typical implementations
1030-1045 Coffee break and product demonstrations
1045-1200 Embedding/De-embedding with a High-Speed Oscilloscope
Abstract
Characterizing digital systems with today's high speed designs is challenging.
The higher data rates cause measurement and observability problems because of
microwave transmission effects: where we are connected is not where we REALLY
where we want to measure, reflections cause uncertainties, and even the probes
used to measure change the design to be analyzed. We commonly hear the word
'de-embedding' referring to the removal some of the unwanted artifacts arising
from the high speed environment and 'embedding' referring to adding effects,
say of a cable, to view for instance, the effective eye that would be seen at a
digital receiver. De-embedding and Embedding are similar mathematical functions
in transforming time domain waveforms. This seminar will focus on the basic
problems that are presented and a common method to address the growing need to
measure and simulate simultaneously.
1200-1330 Lunch and product demonstrations
1330-1430 Measuring Without Placing a Probe and Measuring Things That Haven't
Been Built Yet
Abstract
The Infiniium real time scope with InfiniiSim de-embedding software allows you
measure signals wherever you want, not just where you can place a probe easily.
But to do this, you need the s-parameters between the probe and the point of
interest. The s-parameters could come from measurement, but this reopens the
problem of getting a probe on the point of interest. The first part of this
paper shows how you can use 3D geometry, material properties, and
electromagnetic simulation to create the de-embedding information even for
points of interest that are inaccessible.
In the second part of the paper we'll show how to explore the design space
without the expensive and time consuming "cut and try" method of building and
measuring many different prototypes. We'll show how to use measured data from
hardware that has been built and use simulation with EDA tools to quickly and
cheaply determine the characteristics of candidates that haven't been built yet.
1430-1445 Coffee break and product demonstrations
1445-1545 Use of the Network Analyser for Superior Signal Integrity
measurement
Abstract
As bit rates of digital systems increase, signal integrity of interconnects
drastically affects system performance. Fast and accurate analysis of
interconnect performance in both time and frequency domains become critical to
ensure reliable system performance. This workshop introduces a new time domain
reflectometry (TDR) solution, the Agilent E5071C ENA Option TDR, which provides
a one box solution for high speed interconnect analysis, including impedance,
S-parameters, and eye diagrams. The ENA Option TDR provides the following three
breakthroughs for signal integrity design and verification: Simple and
Intuitive Operation, Fast and Accurate Measurements, and ESD Robustness.
Concepts covered include: frequency domain TDR and time domain TDR theory,
Comparison of measurement performance between Vector Network Analyzer and TDR
Oscilloscope, and interconnect analysis/troubleshooting examples.
1545 - 1600 Q & A
1600 Close
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