[SI-LIST] Re: DDR/DDR2 Vref query
- From: "mitesh y" <mitesh.yogesh@xxxxxxxxx>
- To: "Jennings, Kevin F" <Kevin.Jennings@xxxxxxxxxx>
- Date: Wed, 5 Nov 2008 16:59:08 +0530
hi,
may be this can help you find some answers.
http://www.fairchildsemi.com/ms/MS/MS-6500.pdf
Regards,
Mitesh
On Wed, Nov 5, 2008 at 2:08 AM, Jennings, Kevin F <Kevin.Jennings@xxxxxxxxxx
> wrote:
> I've perused the archives and some datasheets from Micron and TI (App note
> SPRAAL6A for connecting a TMS320DM643x to its DDR2 interface) and am trying
> to understand what possible rationale there could be for caps on Vref.
> The talk in this newsgroup regarding caps seemed to advocate caps to
> provide the divider function, but to meet the +/- 2% tracking requirement on
> Vref relative to Vdd/2 would then require use of 1% caps. There was also
> talk of using X2Y caps to meet that requirement. There was also much talk
> about how Vref is supposed to transmit the Vdd noise from the transmitter to
> the receiver, seemingly oblivious to the fact that the 'transmitter' and the
> 'receiver' for the data bus is itself is not fixed but depends on the memory
> operation being performed.
>
> To my way of thinking, the generation of Vref per its defined function is
> simply a case of trying to faithfully reproduce 50% of a signal 'over there'
> from something that originates 'over here' where the signal in this case is
> whatever Vdd noise there is 'at the transmitter'. A simple parallel
> terminated transmission line would seem to be the thing to do here where the
> pickup point for Vdd is the 'source/transmitter'; the processor and DDR(s)
> are the loads along the line. So for a 50 ohm (as an example) PCB layer,
> one would attach a 50 ohm resistor to ground after the last load just as one
> would normally do to parallel terminate any old signal. To accomplish the
> divide by 2 one would attach a 50 ohm resistor to Vdd (at 'some' appropriate
> place). I don't typically need caps to terminate other transmission lines,
> so I see no reason for why one would need one here either...am I missing
> something?
>
> Since no one device is the 'transmitter' or the 'receiver' then one would
> then have to pick some point for picking up Vdd for the division function
> mentioned above. Any thoughts on what one point there to pick? At the
> memory(s)? At the processor? Do you know that it actually matters?
>
> The other talk I see around (and is shown in the TI app note) is that all
> that is needed is a resistive divider and TI says that other methods are not
> recommended but then the schematic is littered with 5x .1uF caps (one from
> Vdd to Vref; four from Vref to ground). They seem to be indicating use of a
> cap divider in parallel with the resistive one and the three caps to ground
> seem to be there to provide some form of bypass cap function. I guess the
> hope is that the Vdd noise will not be in any frequency range where the 10%
> tolerance caps in the divider will ever become the dominant force in the
> divider. But if that hope is reality, then there wouldn't seem to be much
> need for the caps in the first place when one can simply use 1% resistors
> (albeit it does consume power).
>
> Other places have seemed to advocate caps for 'bypassing' Vref as well but
> this makes no particular sense since the idea of Vref in the first place is
> to transmit any noise on Vdd to each of the receivers...again am I missing
> something here? Why would you want to in any way filter a signal whose
> defined function is to simply be ½ of the input?
>
> There is also talk that Vref should be routed as a generally wider, fat
> trace (the TI app note for example, mentions 20 mils, allowing for necking
> down when inside the BGA array). Going back to the view that the Vref
> generation is a simple transmission line problem, and that Vref is a low
> current net, what rationale could there be for any extra trace width needed
> for Vref?
>
> Any thoughts on why putting a cap anywhere near Vref would in any way
> improve anything having to do with accomplishing it's required function
> would be appreciated. The only thing I could come up with would possibly be
> to use a small one along with the resistor to Vdd to compensate for the load
> capacitance like a scope probe would...but I've never seen any mention
> anywhere of anyone doing that for DDR Vref.
>
> Thanks in advance.
>
> Kevin Jennings
>
>
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