[SI-LIST] Re: Backplane modeling/simulation methodology
- From: "Kinger Cai" <kinger.cai@xxxxxxxxx>
- To: vhdlguy@xxxxxxxxx
- Date: Mon, 5 Nov 2007 00:08:01 -0700
Hi Keyvan,
I believe that you have got the sufficient softwares for your High speed
differetnial channel simulaiton. You still need to pay special attention to:
1. the accurate modleing of the vias involved in the concerned
channel, you had beeter use the full wave fielder solder, say Ansoft HFSS or
CST.
2. the accurate modeling of the concerned channel in the involved
package. It is pretty trick here. you have to make a compromise betwwen
accuracy and efficiency by segment modeling.
3. At least lossy W element modeling method needs to be applied for
Transimission line modeling.
4. High/Low corner case need to be under consideration for all passive
modeling as well as for the active modeling.
5. Input pattern is also pretty trick for catchign the ISI effect.
6. Post process script is also required for poset-processing the
simulation results waveforms.
7. The latest fancy high level analysis methodology is DOE, but it is
not really necessary for those who has accumulted a nunch of Signal
integrity anlysis experience.
8. For the Post-silicon signal integrity validation, a high-speed
oscilloscope is really necessary to validate your design guideline holds
true.
Let me know your further questions.
Kinger
Kinger Consultant Advanced Inc.
High Speed Platform Enabling
www.Kingercai.com
On 11/4/07, Kay Ira <vhdlguy@xxxxxxxxx> wrote:
>
> Hello everyone:
> I'm in the process of modeling a backplane and would like to find out if
> there is an accurate proven modeling/simulation methodology given the
> following parameters.
>
> Bit Rate:
> -Up to 5Gb/s
>
> Models Available:
> -Silicon Models: Encrypted HSPICE
> -Connector Models: S-parameters (provided by a vendor-extracted using CST)
>
> Elements needing accurate modeling:
> -Transmission lines (up to 40")
> -Vias
>
> Tools Available in house:
> -HSPICE
> -ANSOFT (3D and 2D tools)
> -CST
> -ADS
>
> Tools we may be able to get:
> -Tektronix TDR/TDT + IConnect
> -Agilent TDR or VNA + PLTS
>
> I have to use HSPICE to simulate the entire interconnect given my silicon
> models. I'd greatly appreciate your suggestions/comments.
>
> Regards,
> Keyvan Irani
> Raytheon
>
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