[SI-LIST] AW: [SI_LIST] Rj pattern Dependency

  • From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
  • To: "ah.vinod@xxxxxxxxx" <ah.vinod@xxxxxxxxx>, SI-LIST <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 5 Jul 2013 09:09:46 +0000

Hi Vinod,

there is the so called Data Dependent Jitter which somewhat relates to the 
worst case pattern used in BERT. It is caused by low amplitude bits when the 
risetime at the receiver is too low to reach the amplitude settling point (very 
often the worst pattern is 0000001000000) This closes the eye vertically and 
horizontally which means added Jitter in some ways.
This kind of Jitter is affected by losses, GND return, Mode conversion, stub 
effect and other disturbance of the passive channel.
I don't know if the Measurement and simulation tools can decompose this Jitter.

I hope this helps.

BR
Gert



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-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im 
Auftrag von vinod ah
Gesendet: Freitag, 5. Juli 2013 09:12
An: SI-LIST
Betreff: [SI-LIST] [SI_LIST] Rj pattern Dependency

Hi All,

I am seeing one more weird issue on Jitter. Below is the same.

I am trying to do PCIE3 Add-in card eye calibration to meet eye height of 46mV 
& eye width of 41ps. So i had to set Rj to 30% UI & Sj to 17% UI @ 8Gbps on 
BERT to meet the eye width spec for testing PCIe3 Rx circuitry.

What i see is when i change the pattern in BERT from 
PCIE_A_ComplianceP7_B_Keep.ram to PCIE_modified_Compliance_Lane0.ram,
i see Rj value shooting up from 2.4ps rms to 9ps rms !!!!. The setup is 
untouched during the change of pattern. In fact i get 2.4ps rms Rj in 
oscilloscope/SIGTEST with clock pattern with same setup.

Also measured the BERT output directly, there I still see ~2.4ps rms Rj 
(irrespective of pattern used), but when i pass the signal through test setup 
(BERT--> Riser card --> CBB3 --> CLB3 --> Scope), i see increase in Rj with 
pattern change. Riser card + CBB3 + CLB3 is passive 20dB loss FR4 channel and 
no power src is connected to these.

As channels cannot introduce Rj, where is the extra Rj coming from? Is there 
any pattern dependency along with channel effects is causing this increase in 
Rj or is it Jitter post processing tool getting confused with Rj & Dj in this 
scenario after signal going through the 20dB channel?

I am using SIGTEST as well as Jitter decomposition software in scope and both 
the results match.

Regards
Vinod A H
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  • » [SI-LIST] AW: [SI_LIST] Rj pattern Dependency - Havermann, Gert