Peter and Igor,
thanks a lot for your responses. I’ve checked the protection of 0x401bb410 and
as I have more core dumps from identical issue I have also checked the
protection status of all other addresses that are the destination in the mov
instructions causing the SIGSEGV. It’s unfortunately just as Igor says - they
always have just "ALLOC LOAD HAS_CONTENTS” but never READONLY so the
destination addresses should be writable I believe. As the CPUs are all x86_64
Intel E5s I guess it might be possible that I am actually facing the bug Igor
is talking about - which BTW doesn’t make me very happy :)
* use unprotected mcode;
* apply thread affinity for threads running LuaJIT;
If Tomas has a semi-reproducible setup, I'd be interested to knowPeter - thanks a lot, appreciate the patch very much. It should not be a
whether the following has any effect: (if for some reason the hardware
sees this as cross-modifying code rather than self-modifying code,
then some kind of serializing instruction is required for some
hardware models)