[linux-cirrus] [PATCH 2/2] Fix __iomem-related sparse warnings.
- From: Ray Lehtiniemi <rayl@xxxxxxxx>
- To: linux-cirrus@xxxxxxxxxxxxx
- Date: Mon, 09 Oct 2006 18:51:50 -0600
Use the __io() macro to tag I/O space register
accesses. This eliminates many, many warnings when
the sparse checker is used.
Signed-off-by: Ray Lehtiniemi <rayl@xxxxxxxx>
---
arch/arm/mach-ep93xx/clock.c | 12 +++---
arch/arm/mach-ep93xx/core.c | 60 +++++++++++++++++-----------------
arch/arm/mach-ep93xx/ts72xx.c | 8 ++--
drivers/char/watchdog/ep93xx_wdt.c | 10 +++---
drivers/net/arm/ep93xx_eth.c | 2 +-
drivers/rtc/rtc-ep93xx.c | 6 ++--
include/asm-arm/arch-ep93xx/system.h | 10 +++---
include/asm-arm/arch-ep93xx/ts72xx.h | 10 +++---
8 files changed, 59 insertions(+), 59 deletions(-)
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 08ad782..6317918 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -74,8 +74,8 @@ int clk_enable(struct clk *clk)
if (!clk->users++ && clk->enable_reg) {
u32 value;
- value = __raw_readl(clk->enable_reg);
- __raw_writel(value | clk->enable_mask, clk->enable_reg);
+ value = __raw_readl(__io(clk->enable_reg));
+ __raw_writel(value | clk->enable_mask, __io(clk->enable_reg));
}
return 0;
@@ -86,8 +86,8 @@ void clk_disable(struct clk *clk)
if (!--clk->users && clk->enable_reg) {
u32 value;
- value = __raw_readl(clk->enable_reg);
- __raw_writel(value & ~clk->enable_mask, clk->enable_reg);
+ value = __raw_readl(__io(clk->enable_reg));
+ __raw_writel(value & ~clk->enable_mask, __io(clk->enable_reg));
}
}
@@ -128,7 +128,7 @@ void ep93xx_clock_init(void)
{
u32 value;
- value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
+ value = __raw_readl(__io(EP93XX_SYSCON_CLOCK_SET1));
if (!(value & 0x00800000)) { /* PLL1 bypassed? */
clk_pll1.rate = 14745600;
} else {
@@ -138,7 +138,7 @@ void ep93xx_clock_init(void)
clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7];
clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3];
- value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
+ value = __raw_readl(__io(EP93XX_SYSCON_CLOCK_SET2));
if (!(value & 0x00080000)) { /* PLL2 bypassed? */
clk_pll2.rate = 14745600;
} else if (value & 0x00040000) { /* PLL2 enabled? */
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index e3fd1ab..009c836 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -101,9 +101,9 @@ static int ep93xx_timer_interrupt(int ir
{
write_seqlock(&xtime_lock);
- __raw_writel(1, EP93XX_TIMER1_CLEAR);
+ __raw_writel(1, __io(EP93XX_TIMER1_CLEAR));
while ((signed long)
- (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
+ (__raw_readl(__io(EP93XX_TIMER4_VALUE_LOW)) - last_jiffy_time)
>= TIMER4_TICKS_PER_JIFFY) {
last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
timer_tick();
@@ -123,12 +123,12 @@ static struct irqaction ep93xx_timer_irq
static void __init ep93xx_timer_init(void)
{
/* Enable periodic HZ timer. */
- __raw_writel(0x48, EP93XX_TIMER1_CONTROL);
- __raw_writel((508469 / HZ) - 1, EP93XX_TIMER1_LOAD);
- __raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
+ __raw_writel(0x48, __io(EP93XX_TIMER1_CONTROL));
+ __raw_writel((508469 / HZ) - 1, __io(EP93XX_TIMER1_LOAD));
+ __raw_writel(0xc8, __io(EP93XX_TIMER1_CONTROL));
/* Enable lost jiffy timer. */
- __raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH);
+ __raw_writel(0x100, __io(EP93XX_TIMER4_VALUE_HIGH));
setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
}
@@ -137,7 +137,7 @@ static unsigned long ep93xx_gettimeoffse
{
int offset;
- offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
+ offset = __raw_readl(__io(EP93XX_TIMER4_VALUE_LOW)) - last_jiffy_time;
/* Calculate (1000000 / 983040) * offset. */
return offset + (53 * offset / 3072);
@@ -159,15 +159,15 @@ static unsigned char gpio_int_type2[2];
static void update_gpio_ab_int_params(int port)
{
if (port == 0) {
- __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE);
- __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2);
- __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1);
- __raw_writeb(gpio_int_enable[0], EP93XX_GPIO_A_INT_ENABLE);
+ __raw_writeb(0, __io(EP93XX_GPIO_A_INT_ENABLE));
+ __raw_writeb(gpio_int_type2[0], __io(EP93XX_GPIO_A_INT_TYPE2));
+ __raw_writeb(gpio_int_type1[0], __io(EP93XX_GPIO_A_INT_TYPE1));
+ __raw_writeb(gpio_int_enable[0],
__io(EP93XX_GPIO_A_INT_ENABLE));
} else if (port == 1) {
- __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE);
- __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2);
- __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1);
- __raw_writeb(gpio_int_enable[1], EP93XX_GPIO_B_INT_ENABLE);
+ __raw_writeb(0, __io(EP93XX_GPIO_B_INT_ENABLE));
+ __raw_writeb(gpio_int_type2[1], __io(EP93XX_GPIO_B_INT_TYPE2));
+ __raw_writeb(gpio_int_type1[1], __io(EP93XX_GPIO_B_INT_TYPE1));
+ __raw_writeb(gpio_int_enable[1],
__io(EP93XX_GPIO_B_INT_ENABLE));
}
}
@@ -182,12 +182,12 @@ static unsigned char data_direction_regi
void gpio_line_config(int line, int direction)
{
- unsigned int data_direction_register;
+ void __iomem * data_direction_register;
unsigned long flags;
unsigned char v;
data_direction_register =
- EP93XX_GPIO_REG(data_direction_register_offset[line >> 3]);
+ __io(EP93XX_GPIO_REG(data_direction_register_offset[line >>
3]));
local_irq_save(flags);
if (direction == GPIO_OUT) {
@@ -210,9 +210,9 @@ EXPORT_SYMBOL(gpio_line_config);
int gpio_line_get(int line)
{
- unsigned int data_register;
+ void __iomem * data_register;
- data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
+ data_register = __io(EP93XX_GPIO_REG(data_register_offset[line >> 3]));
return !!(__raw_readb(data_register) & (1 << (line & 7)));
}
@@ -220,11 +220,11 @@ EXPORT_SYMBOL(gpio_line_get);
void gpio_line_set(int line, int value)
{
- unsigned int data_register;
+ void __iomem * data_register;
unsigned long flags;
unsigned char v;
- data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
+ data_register = __io(EP93XX_GPIO_REG(data_register_offset[line >> 3]));
local_irq_save(flags);
if (value == EP93XX_GPIO_HIGH) {
@@ -250,7 +250,7 @@ static void ep93xx_gpio_ab_irq_handler(u
unsigned char status;
int i;
- status = __raw_readb(EP93XX_GPIO_A_INT_STATUS);
+ status = __raw_readb(__io(EP93XX_GPIO_A_INT_STATUS));
for (i = 0; i < 8; i++) {
if (status & (1 << i)) {
desc = irq_desc + IRQ_EP93XX_GPIO(0) + i;
@@ -258,7 +258,7 @@ static void ep93xx_gpio_ab_irq_handler(u
}
}
- status = __raw_readb(EP93XX_GPIO_B_INT_STATUS);
+ status = __raw_readb(__io(EP93XX_GPIO_B_INT_STATUS));
for (i = 0; i < 8; i++) {
if (status & (1 << i)) {
desc = irq_desc + IRQ_EP93XX_GPIO(8) + i;
@@ -276,9 +276,9 @@ static void ep93xx_gpio_ab_irq_mask_ack(
update_gpio_ab_int_params(port);
if (line >> 3) {
- __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
+ __raw_writel(1 << (line & 7), __io(EP93XX_GPIO_B_INT_ACK));
} else {
- __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK);
+ __raw_writel(1 << (line & 7), __io(EP93XX_GPIO_A_INT_ACK));
}
}
@@ -347,8 +347,8 @@ void __init ep93xx_init_irq(void)
{
int irq;
- vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
- vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
+ vic_init(__io(EP93XX_VIC1_BASE), 0, EP93XX_VIC1_VALID_IRQ_MASK);
+ vic_init(__io(EP93XX_VIC2_BASE), 32, EP93XX_VIC2_VALID_IRQ_MASK);
for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) {
set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip);
@@ -466,10 +466,10 @@ void __init ep93xx_init_devices(void)
/*
* Disallow access to MaverickCrunch initially.
*/
- v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
+ v = __raw_readl(__io(EP93XX_SYSCON_DEVICE_CONFIG));
v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
- __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
+ __raw_writel(0xaa, __io(EP93XX_SYSCON_SWLOCK));
+ __raw_writel(v, __io(EP93XX_SYSCON_DEVICE_CONFIG));
amba_device_register(&uart1_device, &iomem_resource);
amba_device_register(&uart2_device, &iomem_resource);
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 3a4bf90..400c979 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -133,14 +133,14 @@ static struct platform_device ts72xx_fla
static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
{
- __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
- return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
+ __raw_writeb(addr, __io(TS72XX_RTC_INDEX_VIRT_BASE));
+ return __raw_readb(__io(TS72XX_RTC_DATA_VIRT_BASE));
}
static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
{
- __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
- __raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
+ __raw_writeb(addr, __io(TS72XX_RTC_INDEX_VIRT_BASE));
+ __raw_writeb(value, __io(TS72XX_RTC_DATA_VIRT_BASE));
}
static struct m48t86_ops ts72xx_rtc_ops = {
diff --git a/drivers/char/watchdog/ep93xx_wdt.c
b/drivers/char/watchdog/ep93xx_wdt.c
index 01cf123..721a5b1 100644
--- a/drivers/char/watchdog/ep93xx_wdt.c
+++ b/drivers/char/watchdog/ep93xx_wdt.c
@@ -58,17 +58,17 @@ #define WDT_INTERVAL (HZ/5)
static void wdt_enable(void)
{
- __raw_writew(0xaaaa, EP93XX_WDT_WATCHDOG);
+ __raw_writew(0xaaaa, __io(EP93XX_WDT_WATCHDOG));
}
static void wdt_disable(void)
{
- __raw_writew(0xaa55, EP93XX_WDT_WATCHDOG);
+ __raw_writew(0xaa55, __io(EP93XX_WDT_WATCHDOG));
}
static inline void wdt_ping(void)
{
- __raw_writew(0x5555, EP93XX_WDT_WATCHDOG);
+ __raw_writew(0x5555, __io(EP93XX_WDT_WATCHDOG));
}
static void wdt_startup(void)
@@ -216,11 +216,11 @@ static int __init ep93xx_wdt_init(void)
err = misc_register(&ep93xx_wdt_miscdev);
- boot_status = __raw_readl(EP93XX_WDT_WATCHDOG) & 0x01 ? 1 : 0;
+ boot_status = __raw_readl(__io(EP93XX_WDT_WATCHDOG)) & 0x01 ? 1 : 0;
printk(KERN_INFO PFX "EP93XX watchdog, driver version "
WDT_VERSION "%s\n",
- (__raw_readl(EP93XX_WDT_WATCHDOG) & 0x08)
+ (__raw_readl(__io(EP93XX_WDT_WATCHDOG)) & 0x08)
? " (nCS1 disable detected)" : "");
if (timeout < 1 || timeout > 3600) {
diff --git a/drivers/net/arm/ep93xx_eth.c b/drivers/net/arm/ep93xx_eth.c
index 127561c..295ecd2 100644
--- a/drivers/net/arm/ep93xx_eth.c
+++ b/drivers/net/arm/ep93xx_eth.c
@@ -153,7 +153,7 @@ struct ep93xx_descs
struct ep93xx_priv
{
struct resource *res;
- void *base_addr;
+ void __iomem *base_addr;
int irq;
struct ep93xx_descs *descs;
diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c
index ef4f147..83e2d31 100644
--- a/drivers/rtc/rtc-ep93xx.c
+++ b/drivers/rtc/rtc-ep93xx.c
@@ -24,7 +24,7 @@ #define DRV_VERSION "0.2"
static int ep93xx_get_swcomp(struct device *dev, unsigned short *preload,
unsigned short *delete)
{
- unsigned short comp = __raw_readl(EP93XX_RTC_SWCOMP);
+ unsigned short comp = __raw_readl(__io(EP93XX_RTC_SWCOMP));
if (preload)
*preload = comp & 0xffff;
@@ -37,7 +37,7 @@ static int ep93xx_get_swcomp(struct devi
static int ep93xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
- unsigned long time = __raw_readl(EP93XX_RTC_DATA);
+ unsigned long time = __raw_readl(__io(EP93XX_RTC_DATA));
rtc_time_to_tm(time, tm);
return 0;
@@ -45,7 +45,7 @@ static int ep93xx_rtc_read_time(struct d
static int ep93xx_rtc_set_mmss(struct device *dev, unsigned long secs)
{
- __raw_writel(secs + 1, EP93XX_RTC_LOAD);
+ __raw_writel(secs + 1, __io(EP93XX_RTC_LOAD));
return 0;
}
diff --git a/include/asm-arm/arch-ep93xx/system.h
b/include/asm-arm/arch-ep93xx/system.h
index 79b7185..1934ecd 100644
--- a/include/asm-arm/arch-ep93xx/system.h
+++ b/include/asm-arm/arch-ep93xx/system.h
@@ -15,11 +15,11 @@ static inline void arch_reset(char mode)
local_irq_disable();
- devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
- __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
- __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
+ devicecfg = __raw_readl(__io(EP93XX_SYSCON_DEVICE_CONFIG));
+ __raw_writel(0xaa, __io(EP93XX_SYSCON_SWLOCK));
+ __raw_writel(devicecfg | 0x80000000, __io(EP93XX_SYSCON_DEVICE_CONFIG));
+ __raw_writel(0xaa, __io(EP93XX_SYSCON_SWLOCK));
+ __raw_writel(devicecfg & ~0x80000000,
__io(EP93XX_SYSCON_DEVICE_CONFIG));
while (1)
;
diff --git a/include/asm-arm/arch-ep93xx/ts72xx.h
b/include/asm-arm/arch-ep93xx/ts72xx.h
index a94f63f..1d2fefb 100644
--- a/include/asm-arm/arch-ep93xx/ts72xx.h
+++ b/include/asm-arm/arch-ep93xx/ts72xx.h
@@ -74,28 +74,28 @@ #include <asm/io.h>
static inline int board_is_ts7200(void)
{
- return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
+ return __raw_readb(__io(TS72XX_MODEL_VIRT_BASE)) == TS72XX_MODEL_TS7200;
}
static inline int board_is_ts7250(void)
{
- return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
+ return __raw_readb(__io(TS72XX_MODEL_VIRT_BASE)) == TS72XX_MODEL_TS7250;
}
static inline int board_is_ts7260(void)
{
- return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
+ return __raw_readb(__io(TS72XX_MODEL_VIRT_BASE)) == TS72XX_MODEL_TS7260;
}
static inline int is_max197_installed(void)
{
- return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
+ return !!(__raw_readb(__io(TS72XX_OPTIONS_VIRT_BASE)) &
TS72XX_OPTIONS_MAX197);
}
static inline int is_ts9420_installed(void)
{
- return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
+ return !!(__raw_readb(__io(TS72XX_OPTIONS2_VIRT_BASE)) &
TS72XX_OPTIONS2_TS9420);
}
#endif
--
1.4.2.3.gab26
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