[PCB_FORUM] Re: Trying to match length of pin pairs of same net

You can do this and it is very easy. If this is a bus, then extract one 
net of the bus into sigxp to create an ecset. In sigxp got to 
Set->Constraints and open the Relative Propagation Delay tab. Just enter 
the rules and pinpairs you need and you are good to go.

Take a look at the online documentation there is a tutorial with movies 
that I strongly recommend to see. 

<cdsroot>\doc\cmtutbe\goldenboards\movies

If that is not enough let me know. I wrote an hands-on tutorial which 
recently was distributed to attendies of a local event. I can get you a 
copy if needed.

Andy ;-)






"Abel, Shannon K." <shannon.abel@xxxxxxx> 
02/18/2005 12:30 PM
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[PCB_FORUM] Trying to match length of pin pairs of same net






We are having a serious identity crisis.

We have a need to match lengths of two nets leaving a processor and 
arriving at a sdram chip at two locations. 

Need this trace to split at point a and arrive a point b & c at the same 
time.  These lengths between points a-b & a-c need to be matched lengths.
How can we do this in allegro 15.2.

Thanks for all your help.

Shannon Abel
PWB Designer / Detailer
 <<test.bmp>>

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