[PCB_FORUM] Re: HDI L1-L2 trace routing
- From: Dave Schaefer <dave.schaefer@xxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Tue, 10 Feb 2009 13:16:05 -0600
Mark,
You can check IPC specs for separation requirements based on voltage, but I'd
guess that most are low level signal traces.
If you want to avoid the issue entirely, use L1 as a Ground layer ... removes
your concerns and is great for SI, also reduces the number of L1-L2 vias for
more routing channels on L2.
Check out Happy Holden's HDI book on Mentor website if you haven't already.
Hth,
Dave
>
> From: Mark Salberg <msalberg@xxxxxxxxxxxx>
> Date: 2009/02/10 Tue PM 01:03:33 CST
> To: Cadence User Group <icu-pcb-forum@xxxxxxxxxxxxx>
> Subject: [PCB_FORUM] HDI L1-L2 trace routing
>
> Hi,
> I am doing my first HDI Micro-Via design with a .5mm pitch BGA.
> I am planning to use a 4mil laser drill L1-L2 in a 10 or 12mil pad.
> L1 to L2 dielectric will be roughly 3.5mil thick 1080 pre-preg.
>
> The question I have is there a concern from a reliability standpoint
> routing traces on L1 that may cross L2.
> Voltage breakdown, voids, etc...
> Is it a standard design practice to avoid any traces crossing on such a
> thin dielectric?
>
> Thanks in advance,
> Mark
>
>
>
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Dave Schaefer
dave.schaefer@xxxxxxx
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