[ibis-quality] IQ suggestions
- From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
- To: <ibis-quality@xxxxxxxxxxxxx>
- Date: Wed, 4 May 2005 15:57:51 -0400
Here are few suggestions for IQ improvements.
Mike
========================================================
This check needs stronger wording:
3.2.4 {OPTIONAL} [Pin] RLC complete
RLC is optional on pins. If not defined either leave blank or use
NA NA NA
+++ IBISCHK NOTES
+++++++++++++++++++++++++++++++++++++++++++++++++++++
Proposal: ibischk caution message for missing pin RLC.
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Although IBIS leaves pin RLC optional, the document should make it clear
that accurate timing analysis is not possible without a [Package Model]
or RLC on signal pins. The ibischk caution should be suppressed if
[Package Model] is present, and it might overlook missing RLC on
Power/GND pins. So:
3.2.4 {LEVEL 0} Signal [Pin]s have RLC if no [Package Model]
Accurate timing analysis is not possible unless a [Package Model] is
present or correct RLC parasitic values appear on signal pins. Pins
that represent clock or clocked data signals require either form of
package parasitic data. Pins with POWER, GND, or NC in the model
column are exempt from this check.
+++ IBISCHK NOTES
+++++++++++++++++++++++++++++++++++++++++++++++++++++
Proposal: ibischk caution message for missing signal pins RLC if
[Package Model] not present.
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
========================================================
Add 3.2.6 with hard requirement for Power/GND pin RLC:
3.2.6 {LEVEL 0} Power/GND pin RLC defined if [Pin Mapping] present
Accurate SSN analysis is not possible unless a [Package Model] is
present or correct RLC parasitic values appear on Power and GND pins.
The parasitics on the power and ground pins are what cause rail
collapse. This check is performed only if [Pin Mapping] is present,
since [Pin Mapping] is also required for correct SSN analysis.
+++ IBISCHK NOTES
+++++++++++++++++++++++++++++++++++++++++++++++++++++
Proposal: ibischk caution message if [Pin Mapping] is present and
neither [Package Model] nor RLC values for Power/GND pins
are present.
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
========================================================
Add [Pin Mapping] checks:
3.3.5 {LEVEL 0} Differential pins on same [Pin Mapping]
Two pins that form a differential pair must share common power and
ground
sources, or the return current benefit of differential signal will be
lost.
For example, if pins CLKP and CLKN form a differential pair, the
following
is probably a bad design:
[Pin Mapping] pulldown_ref pullup_ref gnd_clamp_ref
power_clamp_ref
|
CLKP GNDBUS1 PWRBUS1
CLKN GNDBUS2 PWRBUS2
+++ IBISCHK NOTES
+++++++++++++++++++++++++++++++++++++++++++++++++++++
Proposal: ibischk caution message for differential pins not on same
pulldown_ref, pullup_ref, gnd_clamp_ref, or power_clamp_ref as defined
in [Pin Mapping].
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
3.3.6 {LEVEL 0} Buffers on same power bus have same [Voltage Range]
All signal pins on the same power bus as defined by [Pin Mapping] must
use buffer models that operate at the same typ, min, and max voltages.
+++ IBISCHK NOTES
+++++++++++++++++++++++++++++++++++++++++++++++++++++
Proposal: ibischk error message for missing Power/GND pin RLC if
[Pin Mapping] is present and [Package Model] is absent.
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
========================================================
Add [Temperature Range] check:
3.2.7 {LEVEL 0} All buffers have the same [Temperature Range] values
All [Model]s referenced in a [Pin] section, either directly or through
[Model Selector], should have the same typ, min, and max
[Temperature Range] values. The die in a single die component is not
likely to see large temperature variations across the die's surface.
Exceptions to this rule are possible but should be rare. If one buffer
used by a component has max temperature = 90 and another has max
temperature = 100, those buffers probably have not been characterized
with the same part in mind.
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