[ibis-quality] AW: Re: one liners for error checklist

  • From: Lenski Eckhard <eckhard.lenski@xxxxxxxxxxx>
  • To: "'ibis-quality@xxxxxxxxxxxxx'" <ibis-quality@xxxxxxxxxxxxx>
  • Date: Fri, 23 Jul 2004 11:42:48 +0200

Hello Tom,

just to answer the datasheet-question:

If I find in the dc-conditions e.g. three different driver strength
Voh 2.4V  IoH  -4mA
Voh 2.4V  IoH  -8mA
Voh 2.4V  IoH -16mA

than I expect three different driver models, but very often I just get one model


regards
Eckhard

-----Ursprüngliche Nachricht-----
Von: ibis-quality-bounce@xxxxxxxxxxxxx
[mailto:ibis-quality-bounce@xxxxxxxxxxxxx]Im Auftrag von Bob Ross
Gesendet: Mittwoch, 21. Juli 2004 20:30
An: ibis-quality@xxxxxxxxxxxxx
Betreff: [ibis-quality] Re: one liners for error checklist


Tom:

The full checklist gives the total explaination that might be missing
in the title and allows for exceptions, so the correct response might
be NA with a comment.  Level 0 checks are checked by ibischk4.

So any issue or exception can be handled by comments and explainations.
The checklist is not perfect, nor does it consider every legal exception
case.

Comments in text:

Bob

Tom Dagostino wrote:

> Bob
> 
> Why are were making it impossible for some correct models to pass the check
> list?  An ECL model will NEVER have the end points equal to the fixture
> voltages! It is proper and good to model LVDS with the fixture voltage at
> the common mode voltage.  In many cases CML does not completely turn off the
> driver in the high state.
> 
> 5.3   LEVEL 0 First/last point of waveforms equal to V_fixture values

It complies if it passes ibischk4.
> 
> ***********************************************************
> 
> Minimizing should not be the goal, having the correct timing relations ship
> among all the VT curves should be the goal with the VT curves with the least
> delay having minimum lead-in.
> 
> 5.5   LEVEL 1 Minimize waveform lead-in-time

The document agrees with your statement.  The intent was to flag common
50 ns lead-ins as bad form as a result of a full cycle cut and paste,
not find the real correlated "minimum".  So title might be changed.
> 
> ********************************************************
> 
> In many cases the buffer that is used for I/O and In are the same cell and
> thus could have the same C_comp
> 
> 5.2   LEVEL 1 C_comp not same value for in and io

They still could have different values for Input and I/O modes
(according to SPICE).  So the statement is to consider this
and perhaps average the values - or at least document what is
captured as C_comp (the Input value might be more meanful
in SI analysis).  If they are the same, do nothing.
> 
> ************************************************************
> 
> How do you determine the number of models from a datasheet?
> 
> 5.8   LEVEL 1 not Fewer models than in data sheet
> 
The minimum number of models would correspond to the minimum
number of documented specification differences and statements
of differences.

> ************************************************************
> 
> Many high power/high frequency packages have back side copper slabs that
> must be grounded but are typically not in the pin list.
> 
> 5.12  LEVEL 1 no Package pins missing

If it is not documented as a pin, it does not need to be included,
even if the supplies are referenced to it.
> 
> ***********************************************************
> 
> Tom Dagostino
> Teraspeed Consulting Group LLC
> 503-430-1065
> tom@xxxxxxxxxxxxx
> www.teraspeed.com
> 
> -----Original Message-----
> From: ibis-quality-bounce@xxxxxxxxxxxxx
> [mailto:ibis-quality-bounce@xxxxxxxxxxxxx]On Behalf Of Bob Ross
> Sent: Wednesday, July 21, 2004 10:21 AM
> To: ibis-quality@xxxxxxxxxxxxx
> Subject: [ibis-quality] Re: one liners for error checklist
> 
> 
> Eckhard and All:
> 
> I agree, we need to make the check off consistent with compliance,
> not with failure.
> 
> However, the titles need to be cast in a positive manner rather
> than in a negative manner.  Here are some suggestions:
> 
> 
>                       Revised( from error list )
> 
> 5.1   LEVEL 0 Typ/min/max order of parameters correct
> 5.2   LEVEL 1 C_comp typ/min/max values consider both Input and I/O modes
> 5.3   LEVEL 0 First/last point of waveforms equal to V_fixture values
> 5.4   LEVEL 1 Enough points in waveform or small time-step in waveforms
> 5.5   LEVEL 1 Minimize waveform lead-in-time
> 5.6   LEVEL 1 Open_sink/Open_source model with correct Vref, Cref, Rref, Vmeas
> 5.7   LEVEL 1 Differential models with waveforms
> 5.8   LEVEL 1 Models correspond to data sheet
> 5.9   LEVEL 0 Correct model type
> 5.1   LEVEL 0 Consistency of waveform table
> 5.11  LEVEL 1 Open_sink/Open_source model not push-pull
> 5.12  LEVEL 1 Package pins inserted
> 
> (change 5.1 to 5.10 in table)
> 
> -------------------------------------------------------
> Eckhards suggestions:
> 
>                       old     ( from error list )
> 
> 5.1   LEVEL 0 typ/min/max swizzles of parameters
> 5.2   LEVEL 1 C_comp same value for in and io
> 5.3   LEVEL 0 First/last point of waveforms not equal to V_fixture values
> 5.4   LEVEL 1 Too few points in waveform or time-step in waveforms too big
> 5.5   LEVEL 1 Minimize waveform lead-in-time
> 5.6   LEVEL 1 Open-sink model with different Vref,Cref,Rref,Vmeas
> 5.7   LEVEL 1 Differential models without waveforms
> 5.8   LEVEL 1 Fewer models than in data sheet
> 5.9   LEVEL 0 Wrong model type
> 5.1   LEVEL 0 Inconsistency of waveform table
> 5.11  LEVEL 1 Open-sink model modeled/measured as push-pull
> 5.12  LEVEL 1 Package pins missing
> 
> 
> 
>                       new     ( negative logic to make the tick )
> 
> 5.1   LEVEL 0 no typ/min/max swizzles of parameters
> 5.2   LEVEL 1 C_comp not same value for in and io
> 5.3   LEVEL 0 First/last point of waveforms are equal to V_fixture values
> 5.4   LEVEL 1 enough points in waveform or time-step in waveforms too big
> 5.5   LEVEL 1 Minimized waveform lead-in-time
> 5.6   LEVEL 1 Open-sink model with different Vref,Cref,Rref,Vmeas
> 5.7   LEVEL 1 Differential models with waveforms
> 5.8   LEVEL 1 not Fewer models than in data sheet
> 5.9   LEVEL 0 no Wrong model type
> 5.1   LEVEL 0 no Inconsistency of waveform table
> 5.11  LEVEL 1 Open-sink model not modeled/measured as push-pull
> 5.12  LEVEL 1 no Package pins missing
> 
> ---------------
> 
> Bob
> 
> Lenski Eckhard wrote:
> 
> 
>>Hello all,
>>
>>as we talked yesterday, I resend my attachment concerning the one-liners
> 
> for the error-section
> 
>>
>>I see a difference between the titles in the error section  and the
> 
> one-liners from it that appears in the checklist
> 
>>I think in the one-liners the description should change
>>
>>( it's something like positive negative  logic )
>>
>>
>>example:
>>
>>error list :
>>
>>typ/min/max swizzles of parameters
>>
>>
>>one-liner should be :
>>
>>no min/typ/max swizzles
>>
>> <<one-liners-for-errors-checklist.xls>>
>>
>>I tried to change it for all problems in the attached excel-sheet
>>
>>regards
>>Eckhard
>>==================================================
>>Eckhard Lenski   Phone: 0049 89 722 27776
>>Siemens AG       Fax  : 0049 89 722 26879
>>                 Email: eckhard.lenski@xxxxxxxxxxx
>>ICN M&L TDC TC3
>>Hofmannstr. 51
>>81359 München
>>Germany
>>==================================================
>>
> 
> 
> --
> Bob Ross
> Teraspeed Consulting Group LLC     Teraspeed Labs
> 121 North River Drive              13610 SW Harness Lane
> Narragansett, RI 02882             Beaverton, OR 97008
> 503-750-6481                       503-430-1065
> http://www.teraspeed.com           503-246-8048 Direct
> bob@xxxxxxxxxxxxx
> 
> 
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-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
503-750-6481                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@xxxxxxxxxxxxx


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