Doing some additional research, I believe I have found the kind of image that
we need to illustrate the on-die portion of interconnect, including the
distinction between the "buffer" and the "die pad".
Enclosed please find a picture from a printed version of a device mask design.
The large grey areas labeled "P1", "P2", etc. are data I/O pads, to which
wire-bonds would attach. The various traces in different colors reflect
routing on different layers, *not* the functions of the traces. The
red/yellow/green blocks close to the die pads are, I believe, the buffer and
ESD structures. The light blue traces are the power and signal routes on-die;
you can see VCC and VSS labeled quite clearly. The small black blocks are
connection points across layers (vias, in essence). The proximity of the
routes to each other, and the separate of the pad from the buffer structure
would be great illustrations of our BIRD189 structure, as well as areas of
potential crosstalk.
I believe that the use of a mask design is what will be of most use as an
illustration, as the distinction between the buffer circuit and die pad attach
point is extremely clear.
Randy, your drawing is still an excellent example and will appear in the next
draft; the enclosed version is meant to show the more traditional
silicon-substrate approach to on-die interconnect.
I do not know whether this is truly in the public domain (the design dates from
1988, so I suspect the risk is fairly low), but it provides an example of what
we're looking for. I'll check to see whether this particular one can be used,
if a less-distorted version can be found. Alternately, a color image from a
textbook of a similar mask design may also serve our purposes.
Thoughts?
- MM
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