[haiku-commits] haiku: hrev45209 - headers/private/graphics/common
- From: kallisti5@xxxxxxxxxxx
- To: haiku-commits@xxxxxxxxxxxxx
- Date: Sun, 27 Jan 2013 19:19:35 +0100 (CET)
hrev45209 adds 1 changeset to branch 'master'
old head: 953d310a47372bb97f2b1154d032aa344dbbcb69
new head: 7aedc8b3e1187d4868bafc9a948c91f2a8bb0b6f
overview: http://cgit.haiku-os.org/haiku/log/?qt=range&q=7aedc8b+%5E953d310
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7aedc8b: edid_raw: Correct missing bitfield
* edid1_detailed_timing_raw was missing
a field which threw off the sync bits.
* The result was the monitor will receive
a different sync polarity than it requested.
Most monitors handle this, but it is still
a bug
[ Bill Randle <billr@xxxxxxxxxx> ]
----------------------------------------------------------------------------
Revision: hrev45209
Commit: 7aedc8b3e1187d4868bafc9a948c91f2a8bb0b6f
URL: http://cgit.haiku-os.org/haiku/commit/?id=7aedc8b
Author: Bill Randle <billr@xxxxxxxxxx>
Date: Sun Jan 27 17:59:19 2013 UTC
Committer: Alexander von Gluck IV <kallisti5@xxxxxxxxxxx>
Commit-Date: Sun Jan 27 18:18:49 2013 UTC
----------------------------------------------------------------------------
1 file changed, 10 insertions(+), 2 deletions(-)
headers/private/graphics/common/edid_raw.h | 12 ++++++++++--
----------------------------------------------------------------------------
diff --git a/headers/private/graphics/common/edid_raw.h
b/headers/private/graphics/common/edid_raw.h
index 5473d23..ee553a7 100644
--- a/headers/private/graphics/common/edid_raw.h
+++ b/headers/private/graphics/common/edid_raw.h
@@ -1,6 +1,13 @@
/*
* Copyright 2003, Thomas Kurschel. All Rights Reserved.
* Distributed under the terms of the MIT License.
+ *
+ * Copyright 2006-2013 Haiku, Inc. All rights reserved.
+ * Distributed under the terms of the MIT License.
+ *
+ * Authors:
+ * Thomas Kurschel
+ * Bill Randle, billr@xxxxxxxxxx
*/
#ifndef _EDID_RAW_H
#define _EDID_RAW_H
@@ -224,12 +231,13 @@ typedef struct _PACKED {
);
uint8 h_border;
uint8 v_border;
- BBITFIELD8_4 (
+ BBITFIELD8_5 (
interlaced : 1,
stereo : 2, // upper bit set - left on sync
// lower bit set - right on sync
sync : 2,
- misc : 2
+ misc : 2,
+ stereo_il : 1
);
} edid1_detailed_timing_raw;
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