hrev43798 adds 3 changesets to branch 'master' old head: b034842c831ae2295d16090748e8f46c7044a740 new head: 25d6ff130c5fcc0d7a4f4e9f185ee94abbd26af7 ---------------------------------------------------------------------------- de49f7d: PCI: print human readable ranges for PCI-PCI bridge. * pci_info: computes I/O, memory and prefetchable memory windows and displays them instead of raw register values. 9f6b2d7: PCI: add bridge control flags and use them. 25d6ff1: PCI: use definitions for PCI status. [ Jérôme Duval <jerome.duval@xxxxxxxxx> ] ---------------------------------------------------------------------------- 3 files changed, 77 insertions(+), 39 deletions(-) headers/os/drivers/PCI.h | 13 ++++ src/add-ons/kernel/bus_managers/pci/pci.cpp | 60 ++++++++++-------- src/add-ons/kernel/bus_managers/pci/pci_info.cpp | 43 +++++++++---- ############################################################################ Commit: de49f7dda39bcdcbf4c5a1f52346c6632cca469c URL: http://cgit.haiku-os.org/haiku/commit/?id=de49f7d Author: Jérôme Duval <jerome.duval@xxxxxxxxx> Date: Mon Feb 27 19:49:15 2012 UTC PCI: print human readable ranges for PCI-PCI bridge. * pci_info: computes I/O, memory and prefetchable memory windows and displays them instead of raw register values. ---------------------------------------------------------------------------- diff --git a/src/add-ons/kernel/bus_managers/pci/pci_info.cpp b/src/add-ons/kernel/bus_managers/pci/pci_info.cpp index 2a1b17e..c869d92 100644 --- a/src/add-ons/kernel/bus_managers/pci/pci_info.cpp +++ b/src/add-ons/kernel/bus_managers/pci/pci_info.cpp @@ -32,19 +32,36 @@ static void print_pci2pci_bridge_info(const pci_info *info, bool verbose) { TRACE(("PCI: subsystem_id %04x, subsystem_vendor_id %04x\n", - info->u.h1.subsystem_id, info->u.h1.subsystem_vendor_id)); - TRACE(("PCI: primary_bus %02x, secondary_bus %02x, subordinate_bus %02x, secondary_latency %02x\n", - info->u.h1.primary_bus, info->u.h1.secondary_bus, info->u.h1.subordinate_bus, info->u.h1.secondary_latency)); - TRACE(("PCI: io_base_upper_16 %04x, io_base %02x\n", - info->u.h1.io_base_upper16, info->u.h1.io_base)); - TRACE(("PCI: io_limit_upper_16 %04x, io_limit %02x\n", - info->u.h1.io_limit_upper16, info->u.h1.io_limit)); - TRACE(("PCI: memory_base %04x, memory_limit %04x\n", - info->u.h1.memory_base, info->u.h1.memory_limit)); - TRACE(("PCI: prefetchable_memory_base_upper32 %08lx, prefetchable_memory_base %04x\n", - info->u.h1.prefetchable_memory_base_upper32, info->u.h1.prefetchable_memory_base)); - TRACE(("PCI: prefetchable_memory_limit_upper32 %08lx, prefetchable_memory_limit %04x\n", - info->u.h1.prefetchable_memory_limit_upper32, info->u.h1.prefetchable_memory_limit)); + info->u.h1.subsystem_id, info->u.h1.subsystem_vendor_id)); + TRACE(("PCI: primary_bus %02x, secondary_bus %02x, subordinate_bus %02x," + " secondary_latency %02x\n", info->u.h1.primary_bus, + info->u.h1.secondary_bus, info->u.h1.subordinate_bus, info->u.h1.secondary_latency)); + uint32 io_base = ((uint32)info->u.h1.io_base & 0xf0) << 8; + if (info->u.h1.io_base & 1) + io_base += ((uint32)info->u.h1.io_base_upper16 << 16); + uint32 io_limit = (((uint32)info->u.h1.io_limit & 0xf0) << 8) + 0xfff; + if (info->u.h1.io_limit & 1) + io_limit += info->u.h1.io_limit_upper16 << 16; + TRACE(("PCI: I/O window %04lx-%04lx\n", io_base, io_limit)); + uint32 memory_base = ((uint32)info->u.h1.memory_base & 0xfff0) << 16; + uint32 memory_limit = (((uint32)info->u.h1.memory_limit & 0xfff0) << 16) + + 0xfffff; + TRACE(("PCI: memory window %04lx-%04lx\n", memory_base, memory_limit)); + uint64 prefetchable_memory_base = + ((uint32)info->u.h1.prefetchable_memory_base & 0xfff0) << 16; + if (info->u.h1.prefetchable_memory_base & 1) { + prefetchable_memory_base += + (uint64)info->u.h1.prefetchable_memory_base_upper32 << 32; + } + uint64 prefetchable_memory_limit = + (((uint32)info->u.h1.prefetchable_memory_limit & 0xfff0) << 16) + + 0xfffff; + if (info->u.h1.prefetchable_memory_limit & 1) { + prefetchable_memory_limit += + (uint64)info->u.h1.prefetchable_memory_limit_upper32 << 32; + } + TRACE(("PCI: prefetchable memory window %016llx-%016llx\n", + prefetchable_memory_base, prefetchable_memory_limit)); TRACE(("PCI: bridge_control %04x, secondary_status %04x\n", info->u.h1.bridge_control, info->u.h1.secondary_status)); TRACE(("PCI: interrupt_line %02x, interrupt_pin %02x\n", ############################################################################ Commit: 9f6b2d77b7ce3a223064362640f15689f3fa92ff URL: http://cgit.haiku-os.org/haiku/commit/?id=9f6b2d7 Author: Jérôme Duval <jerome.duval@xxxxxxxxx> Date: Mon Feb 27 20:46:01 2012 UTC PCI: add bridge control flags and use them. ---------------------------------------------------------------------------- diff --git a/headers/os/drivers/PCI.h b/headers/os/drivers/PCI.h index adccd60..84535da 100644 --- a/headers/os/drivers/PCI.h +++ b/headers/os/drivers/PCI.h @@ -655,6 +655,19 @@ struct pci_module_info { #define PCI_pin_d 0x04 #define PCI_pin_max 0x04 +/** PCI bridge control register bits */ +#define PCI_bridge_parity_error_response 0x0001 /* 1/0 Parity Error Response */ +#define PCI_bridge_serr 0x0002 /* 1/0 SERR# en/disabled */ +#define PCI_bridge_isa 0x0004 /* 1/0 ISA en/disabled */ +#define PCI_bridge_vga 0x0008 /* 1/0 VGA en/disabled */ +#define PCI_bridge_master_abort 0x0020 /* 1/0 Master Abort mode */ +#define PCI_bridge_secondary_bus_reset 0x0040 /* 1/0 Secondary bus reset */ +#define PCI_bridge_secondary_bus_fastback 0x0080 /* 1/0 fast back-to-back en/disabled */ +#define PCI_bridge_primary_discard_timeout 0x0100 /* 1/0 primary discard timeout */ +#define PCI_bridge_secondary_discard_timeout 0x0200 /* 1/0 secondary discard timeout */ +#define PCI_bridge_discard_timer_status 0x0400 /* 1/0 discard timer status */ +#define PCI_bridge_discard_timer_serr 0x0800 /* 1/0 discard timer serr */ + /** PCI Capability Codes */ #define PCI_cap_id_reserved 0x00 #define PCI_cap_id_pm 0x01 /* Power management */ diff --git a/src/add-ons/kernel/bus_managers/pci/pci.cpp b/src/add-ons/kernel/bus_managers/pci/pci.cpp index d1b8a43..23b8a71 100644 --- a/src/add-ons/kernel/bus_managers/pci/pci.cpp +++ b/src/add-ons/kernel/bus_managers/pci/pci.cpp @@ -892,16 +892,21 @@ PCI::_ConfigureBridges(PCIBus *bus) // Enable: Parity Error Response, SERR, Master Abort Mode, Discard // Timer SERR // Clear: Discard Timer Status - bridgeControlNew |= (1 << 0) | (1 << 1) | (1 << 5) | (1 << 10) - | (1 << 11); + bridgeControlNew |= PCI_bridge_parity_error_response + | PCI_bridge_serr | PCI_bridge_master_abort + | PCI_bridge_discard_timer_status + | PCI_bridge_discard_timer_serr; // Set discard timer to 2^15 PCI clocks - bridgeControlNew &= ~((1 << 8) | (1 << 9)); + bridgeControlNew &= ~(PCI_bridge_primary_discard_timeout + | PCI_bridge_secondary_discard_timeout); WriteConfig(dev->domain, dev->bus, dev->device, dev->function, PCI_bridge_control, 2, bridgeControlNew); bridgeControlNew = ReadConfig(dev->domain, dev->bus, dev->device, dev->function, PCI_bridge_control, 2); - dprintf("PCI: dom %u, bus %u, dev %2u, func %u, changed PCI bridge control from 0x%04x to 0x%04x\n", - dev->domain, dev->bus, dev->device, dev->function, bridgeControlOld, bridgeControlNew); + dprintf("PCI: dom %u, bus %u, dev %2u, func %u, changed PCI bridge" + " control from 0x%04x to 0x%04x\n", dev->domain, dev->bus, + dev->device, dev->function, bridgeControlOld, + bridgeControlNew); } if (dev->child) ############################################################################ Revision: hrev43798 Commit: 25d6ff130c5fcc0d7a4f4e9f185ee94abbd26af7 URL: http://cgit.haiku-os.org/haiku/commit/?id=25d6ff1 Author: Jérôme Duval <jerome.duval@xxxxxxxxx> Date: Mon Feb 27 21:00:54 2012 UTC PCI: use definitions for PCI status. ---------------------------------------------------------------------------- diff --git a/src/add-ons/kernel/bus_managers/pci/pci.cpp b/src/add-ons/kernel/bus_managers/pci/pci.cpp index 23b8a71..93bb755 100644 --- a/src/add-ons/kernel/bus_managers/pci/pci.cpp +++ b/src/add-ons/kernel/bus_managers/pci/pci.cpp @@ -931,22 +931,23 @@ PCI::ClearDeviceStatus(PCIBus *bus, bool dumpStatus) // Clear and dump PCI device status uint16 status = ReadConfig(dev->domain, dev->bus, dev->device, dev->function, PCI_status, 2); - WriteConfig(dev->domain, dev->bus, dev->device, dev->function, PCI_status, - 2, status); + WriteConfig(dev->domain, dev->bus, dev->device, dev->function, + PCI_status, 2, status); if (dumpStatus) { - kprintf("domain %u, bus %u, dev %2u, func %u, PCI device status 0x%04x\n", - dev->domain, dev->bus, dev->device, dev->function, status); - if (status & (1 << 15)) + kprintf("domain %u, bus %u, dev %2u, func %u, PCI device status " + "0x%04x\n", dev->domain, dev->bus, dev->device, dev->function, + status); + if (status & PCI_status_parity_error_detected) kprintf(" Detected Parity Error\n"); - if (status & (1 << 14)) + if (status & PCI_status_serr_signalled) kprintf(" Signalled System Error\n"); - if (status & (1 << 13)) + if (status & PCI_status_master_abort_received) kprintf(" Received Master-Abort\n"); - if (status & (1 << 12)) + if (status & PCI_status_target_abort_received) kprintf(" Received Target-Abort\n"); - if (status & (1 << 11)) + if (status & PCI_status_target_abort_signalled) kprintf(" Signalled Target-Abort\n"); - if (status & (1 << 8)) + if (status & PCI_status_parity_signalled) kprintf(" Master Data Parity Error\n"); } @@ -958,19 +959,20 @@ PCI::ClearDeviceStatus(PCIBus *bus, bool dumpStatus) WriteConfig(dev->domain, dev->bus, dev->device, dev->function, PCI_secondary_status, 2, secondaryStatus); if (dumpStatus) { - kprintf("domain %u, bus %u, dev %2u, func %u, PCI bridge secondary status 0x%04x\n", - dev->domain, dev->bus, dev->device, dev->function, secondaryStatus); - if (secondaryStatus & (1 << 15)) + kprintf("domain %u, bus %u, dev %2u, func %u, PCI bridge " + "secondary status 0x%04x\n", dev->domain, dev->bus, + dev->device, dev->function, secondaryStatus); + if (secondaryStatus & PCI_status_parity_error_detected) kprintf(" Detected Parity Error\n"); - if (secondaryStatus & (1 << 14)) + if (secondaryStatus & PCI_status_serr_signalled) kprintf(" Received System Error\n"); - if (secondaryStatus & (1 << 13)) + if (secondaryStatus & PCI_status_master_abort_received) kprintf(" Received Master-Abort\n"); - if (secondaryStatus & (1 << 12)) + if (secondaryStatus & PCI_status_target_abort_received) kprintf(" Received Target-Abort\n"); - if (secondaryStatus & (1 << 11)) + if (secondaryStatus & PCI_status_target_abort_signalled) kprintf(" Signalled Target-Abort\n"); - if (secondaryStatus & (1 << 8)) + if (secondaryStatus & PCI_status_parity_signalled) kprintf(" Data Parity Reported\n"); } @@ -980,9 +982,10 @@ PCI::ClearDeviceStatus(PCIBus *bus, bool dumpStatus) WriteConfig(dev->domain, dev->bus, dev->device, dev->function, PCI_bridge_control, 2, bridgeControl); if (dumpStatus) { - kprintf("domain %u, bus %u, dev %2u, func %u, PCI bridge control 0x%04x\n", - dev->domain, dev->bus, dev->device, dev->function, bridgeControl); - if (bridgeControl & (1 << 10)) { + kprintf("domain %u, bus %u, dev %2u, func %u, PCI bridge " + "control 0x%04x\n", dev->domain, dev->bus, dev->device, + dev->function, bridgeControl); + if (bridgeControl & PCI_bridge_discard_timer_status) { kprintf(" bridge-control: Discard Timer Error\n"); } }