[ee_shoppahs] Fwd: Job Description-HW Role-CA
- From: Dave Davis <d.w.davis@xxxxxxxx>
- To: "Shoppahs \">" <"\"\"ee_shoppahs\""@freelists.org>
- Date: Wed, 28 Jul 2010 10:16:35 -0700
Please mention my name....:-)
I think this shozo is blowing smoke about the referral bonus, but what
the heck...
Dave
-------- Original Message --------
Subject: Job Description-HW Role-CA
Date: Tue, 27 Jul 2010 17:44:47 -0500
From: David Cuozzo <David.Cuozzo@xxxxxxxxxxxxxx>
To: <d.w.davis@xxxxxxxx>
David,
Thanks for your time today. Here is the job description that we spoke
about. They can pay between 65-80 hr depending on experience. Please let
me know if you might be interested or if you can refer anyone we do pay
a 2,000 dollar referral bonus. Thanks and I look forward to hearing from
you.
3-6 months
San Jose, CA
*Design Contractor JOB Description:
- Familiar with Verilog for RTL implementation, FPGA synthesis
and design verification.
- Familiar with timing closure and design margins for EDVT.
- Specific design skills with implementing CPU/local bus
interfaces, High speed Serdes interfaces like SGMII/XAUI and low speed
two wire interfaces such as MDIO, I2C etc.,.
- Extensive experience with Xilinx devices and ISE design flow
for preferred.
- Lab Debug using Xilinx Chipscope, digital scope, logic
analyzer etc.*
**
*Generate design specification and pinout and provide any routing
constraints to board designer and participate in schematic review.*
**
**
*
****
David Cuozzo
(Office) 978.923.7618 | (Mobile) 860.622.8103
dcuozzo@xxxxxxxxxxxxxx <mailto:r@xxxxxxxxxxxxxx>
**Engineering Outcome Certainty**
Symphony Services
1 Technology Park Dr, Westford, MA 01886
www.symphonysv.com <http://www.symphonysv.com/>
*
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