[uae] Re: Demo
- From: Richard Drummond <evilrich@xxxxxxxxxxxxxx>
- To: uae@xxxxxxxxxxxxx
- Date: Mon, 4 Oct 2004 21:15:35 -0500
Hi Toni
On Monday 04 October 2004 03:53 pm, Toni Wilen wrote:
> If I remember correctly, the fix was to replace following part in
> isagnus[]-array:
>
> old:
>
> /* BPLxPTH/BPLxPTL */
> 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 16 */
> 0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0, /* 16 */
>
> new:
>
> /* BPLxPTH/BPLxPTL */
> 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 16 */
> 0,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0, /* 16 */
>
> (this may not be 100% correct fix because even one cycle more or less in
> copper or bitplane emulation may cause similar effects and chipset
> internal timing is not completely known..)
Thanks, Toni. Actually, you've used
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 16 */
0,1,0,0,1,1,0,0,0,0,0,0,0,0,0,0, /* 16 */
in 0.9.92b3. This seems to do the trick.
Giulio, there's a patch attached if you want to try it out.
Cheers,
Rich
Index: src/custom.c
===================================================================
RCS file: /cvsroot/uaedev/uae/src/custom.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- src/custom.c 3 Aug 2004 20:13:52 -0000 1.7
+++ src/custom.c 5 Oct 2004 02:10:50 -0000 1.8
@@ -3451,7 +3451,7 @@
1,1,0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1,0,0,0,0,0,0, /* 32
0xa0 - 0xde */
/* BPLxPTH/BPLxPTL */
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 16 */
- 0,0,0,0,1,1,0,0,0,0,0,0,0,0,0,0, /* 16 */
+ 0,1,0,0,1,1,0,0,0,0,0,0,0,0,0,0, /* 16 */
/* SPRxPTH/SPRxPTL */
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 16 */
/* SPRxPOS/SPRxCTL/SPRxDATA/SPRxDATB */
Other related posts:
