Hi All I have a small doubt regarding Topology of routed PCB board Setup: Integrated -------------------Flash --CPLD(xilinx) Processor | | R-22ohm | | | SDRAM | (micron) | Virtex FPGA--------Virtex FPGA (LVTTL24F) (LVTTL24F) Speed:133MHz (SDRAM and Processor) This is one of the routed topology for which SI analysis to be done All the reflection will sit on SDRAM when Processor Drives and The response at SDRAM is very very bad .I feel the Flash has to be placed close and SDRAM farther . But one of the argument is when SDRAM is conducting none of the devices (other than Processor) are active ( Tri-stated) so Designers feel this is not at all a serious problem Since SDRAMS are operating at very high frequency they have to be placed close !!!!!!! Can any of you help me regarding this approach Thank you SUDHEER ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu