[SI-LIST] Re: via teardropping effect on signal integrity?
- From: Ivor Bowden <ivor@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 02 Jul 2003 09:08:44 -0700
My sincere thanks to all that responded to this thread!
:-)
Ivor
mkhusid wrote:
> Ivor,
>
> If one uses a TDR for the measurements, a short discontinuity typically
> shows up as a blip. As the signal risetime increases (that is, the
> signal is getting slower), the blip becomes flatter and wider until it
> literally disappears. Typically, a discontinuity is considered
> insignificant if it is less than half of the signal rise time.
>
> A 66MHz PCI signal has a rise time around 2ns. Given the approximate
> 180ps/in delay in striplines and 150ps/in delay in microstrip layers,
> that's several inches of a trace. So, a signal will only be able to
> detect a discontinuity which is that long and has significantly
> different impedance from the rest of the trace.
>
> The teardrop effect is likely to be comparable to the via size, that's
> 40mils, and is much much smaller than anything your signal will notice.
>
> Regarding the analog LVDS signals: you can use the risetime of those
> signals and the above reasoning to determine whether the 40mil teardrop
> is long enough to affect the signals.
>
> Mike
>
> ----------------------------------------------------------------
> Michael Khusid
> Ansoft Corporation
> SI/HF Application Engineer
>
> 25 Burlington Mall Road, 6th floor
> Burlington, MA 01803-4100
>
> Tel 781-229-8900 Ext. 134 <--- New extension
> Fax 781-229-8624
> ---------------------http://www.ansoft.com ---------------------
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Ivor Bowden
> Sent: Tuesday, July 01, 2003 4:56 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] via teardropping effect on signal integrity?
>
> Hi, if I have a fairly standard stackup (sig,plane,sig,sig,plane,sig;
> signal traces are 80 ohms) with .006"/.006" trace/space and .040" via
> pads with .008" finished hole size, signal trace lengths of 2.5" and
> 7.5", would there be any significant issues with teardropping the vias?
> The signals are either PCI (66MHz clock) or analog/LVDS.
> tia,
> Ivor Bowden
>
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