Hi Experts,
I have design a SI-test brd and do some measurements by VNA to obtain the S
parameters from 0-10GHz. Also according to the stackup from PCB vendors, I
try to do simulation by
HFSS and obtain the simulation results.
I have compared the amplitude and phase of S12 of measurement and
simulation results
and find some mismatch.
I suspect that Dk and Df in stackup from vendors are not accurate enough.
Maybe trace width and spacing will be more accurate than Dk and Df.
I have many microstrip traces on this test brd. I want to try to tune Dk
and Df and do batch sweep in HFSS simulation. Do you think that I can
successed to obtain an optimized Dk and Df that
I can finally match simulation and measurement results for these 10
different kinds of microstrip traces?
If it's so difficult, I may give up because of schedule.
--
best wishes,
Jun Zhang
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