[SI-LIST] Re: the difference of current profile between power supply path, signal path and return path in a circuit loop
- From: "tao xu" <helen.tao.xu@xxxxxxxxx>
- To: xuzhengrong@xxxxxxxxxx
- Date: Tue, 4 Sep 2007 08:58:20 +0800
Hi, Zhengrong,
I think the key for this question is if this component can be treated as a
node in your analysis. If the answer is yes, the description above is
correct. but if it is not, we should think more.
for one buffer case, I guess it is easy to simplify it as a node since power
pin, group pin and signal out pin is assumed at same location. and a quick
solution can be drawn that output current in signal path is same as one in
return path. (input current is too small to be ignored)
But for a whole chip, we always can not treat it at node in current signal
speed and must considered its distribution characters. no such ONE node as
above can be created.
Thanks and Regards
Tao ( Helen )
On 8/31/07, xuzhengrong <xuzhengrong@xxxxxxxxxx> wrote:
>
> Benny,
> I know my question is so basic and seems to be ridiculous.
> What I interest is how to get the current profile for voltage noise
> simulation associated with PDN, for it is hard to get the current =
> profile of
> ICs in the power rail from IC supplier.
> Though there's a method to get current profile by voltage tests =
> indirectly,
> I'm still interested in getting it by direct tests.
> So I ponder upon the problem whether it exits a path I can test simply =
> and
> accurately?
>
> Zhengrong
>
>
>
>
>
> -----=D3=CA=BC=FE=D4=AD=BC=FE-----
> =B7=A2=BC=FE=C8=CB: Benny Yan [mailto: zyan@xxxxxxxxxx]=20
> =B7=A2=CB=CD=CA=B1=BC=E4: 2007=C4=EA8=D4=C230=C8=D5 21:20
> =CA=D5=BC=FE=C8=CB: xuzhengrong@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
> =D6=F7=CC=E2: RE: [SI-LIST] the difference of current profile between =
> power supply
> path, signal path and return path in a circuit loop
>
> Forgot Kirchhoff's current law?
> =20
>
> Benny Yan
> IO Methodology Inc.=20
>
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx ]
> =
> On
> Behalf Of xuzhengrong
> Sent: Thursday, August 30, 2007 8:34 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] the difference of current profile between power =
> supply
> path, signal path and return path in a circuit loop
>
> Hi all,
> After scanning the discussion about the return path, I have to think =
> such
> a question that, what does the current profile in power supply, signal =
> path
> and return path in a circuit loop look like, and what is the difference =
> of
> the three ones?
> As is known to all, in a simple DC circuit such as small bulb loop, =
> current
> supply is equal to the return current between possive pole and negative
> pole.
> Then, in a high speed digital circuit, if only one buffer works and =
> outputs
> one signal level(excluding multi-signal use the common return path and =
> power
> supply path ), would current profiles in the signal path and its return =
> path
> be the same?
> Furthermore, as the source of the signal current, what is the =
> difference
> between the current profile in the power supply path and its signal =
> current
> profile?
>
> Thanks for any idea.
>
> Zhengrong
>
>
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