[SI-LIST] Re: spice modeling for organic build-up substrates
- From: Anil Pannikkat <apannikk@xxxxxxxxxx>
- To: "'jdelacruz@xxxxxxxxxxxx'" <jdelacruz@xxxxxxxxxxxx>,"Si-List (E-mail)" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 16 Jan 2003 12:17:38 -0800
Javier
We have struggled with this issue too and so far dealt with it by
using two different designs (one for fab and one for simulation). The
problem is that different substrate vendors could have different offsets. I
have simulated impedances using manufactured x-section values and still come
up with the offset you are talking about.
Thus so far we have relied on initial test measurements to tell us
what the offset is, gone back to the drawing board in SI2D to match the
measurements and redrew future designs to incorporate the changes for
simulation purposes.
It is pretty easy in package design programs like APD to change the
widths of nets and then transfer the info to HFSS/SI3D etc.
Regards
Anil
Anil Pannikkat
MTS Package Development * : 408-544-7542
Altera Corporation Fax: 408-544-6404
101, Innovation Drive, M/S 4202 *: apannikk@xxxxxxxxxx
San Jose, CA 95134 *: http://www.altera.com
-----Original Message-----
From: Javier DeLaCruz [mailto:jdelacruz@xxxxxxxxxxxx]
Sent: Thursday, January 16, 2003 12:01 PM
To: Si-List (E-mail)
Subject: [SI-LIST] spice modeling for organic build-up substrates
All,
I'm looking for some help in modeling organic build-up package =
substrates in order to output spice models, etc. The trick here is that =
in order attain a 100 ohm differential pair, the common mode impedance =
must be designed to a 85-88 ohm target. During manufacture, the traces =
are roughened which reduces the height, and more importantly, the width = of
the traces. This reduction in capacitance to ground, and the = increase in
both resistance and inductance causes the lines to increase = in impedance
about 15%. This means using the extraction routines in = software such as
Cadence APD/APE or Ansoft SIwave/Q3D would generate = incorrect spice models
since they were designed (in CAD) to have an = 85-88 ohm impedance. =20
Does anyone have an idea of how to generate a negative offset in
height = and width of traces in any of these programs, or any other popular
= package design/analysis package? I'd like to avoid having to generate =
two designs for each package substrate. One would be for the = fabrication
masks, and the other would represent reality.
Thanks,
Javier DeLaCruz
Sr. Principal Packaging Engineer
eSilicon Corporation
890 Mountain Avenue
Murray Hill, NJ 07974
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