[SI-LIST] Re: slots in planes (once again)
- From: wolfgang.maichen@xxxxxxxxxxxx
- To: "Joel Brown" <joel@xxxxxxxxxx>
- Date: Thu, 22 Jul 2010 11:33:49 -0700
Joel,
that approach is limited to relatively low frequencies (or data rates).
The limitations are two-fold:
(1) it's pretty hard to get the parasitic inductance (internal inductance
+ mounting inductance from vias etc.) of a capacitor significantly below
1nH - and 1 nH is a large discontinuity at Gb/s data rates.
(2) even more restricitive, you can't get more than one capacitor on close
to the trace on either side of the trace. For all other caps the limiting
factor is then mostly the distance to the trace - adding loop area and
thus parasitic inductance in the return path. It wouldn't help even if the
caps had zero inductance.
Wolfgang
"Joel Brown" <joel@xxxxxxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
07/22/2010 11:22 AM
To
"'Gene Glick'" <gglick@xxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
cc
Subject
[SI-LIST] Re: slots in planes (once again)
Bridge across the slot with caps every .5 inch.
It will make it look like a solid plane at least over the frequency range
that the caps have low impedance.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On
Behalf Of Gene Glick
Sent: Thursday, July 22, 2010 10:55 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] slots in planes (once again)
Realizing that slots in a plane (ground, for example) are a bad idea, is
it ever acceptable?
Here's something some info from Henry Ott:
http://www.hottconsultants.com/techtips/tips-slots.html
He says "don't", but then says well, if you do so, don't allow any lines
to cross them. OK, I'm good by that. But, don't slotted planes give
rise to eddy currents around the aperture (even if nothing ever crosses
the slots)?
gene
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