[SI-LIST] Re: slew rate and driver impedance
- From: James_R_Jones@xxxxxxxx
- To: linwee70@xxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Wed, 25 Sep 2002 13:40:57 -0500
Slew rate and drive strength are related for sure, but you need to know what
load the driver sees in order to determine the driven waveform shape. Slew
rate turns out to be dV/dt with the drive strength charging up the load that
the driver sees. For example, with IBIS, drive strength is defined with an
I/V curve, meaning the amound of current that the driver is capable of
delivering at each possible voltage level of the I/O pin. At a given
voltage R=V/I shows the output impedance of the driver. Also, the rise/fall
wave defined in IBIS shows how the driver would behave if it were driving
predefined load.
I recommend using a simulator to find the relationship between slew rate and
drive strength. However, if you want a simple approximation, make an
infinite strength driver (Vpulse in spice) and use the series output
impedance. Model the load with a Tline segment loaded with a receiver
input. This will give you a rough approximation of rise time.
Hope this helps,
James R. Jones
Dell
-----Original Message-----
From: Lin Wee [mailto:linwee70@xxxxxxxxx]
Sent: Wednesday, September 25, 2002 1:18 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] slew rate and driver impedance
Hello:
Is there a relationship b/w slew rate & output
impedance of the driver ? Can a driver(FPGA) with
two different slew rate options have the same
output impedance ?
Thanks;
Lin
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