[SI-LIST] Re: reference plane
- From: "Loyer, Jeff W" <jeff.w.loyer@xxxxxxxxx>
- To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 27 Jun 2002 08:21:11 -0700
Someone shared that they found my results non-intuitive. Just thought I'd
share something to make others with the same impression feel better.
I found it VERY non-intuitive, at first, and still find parts of it very
subtle. For instance, consider the following symmetrical stripline case:
X position: A B C
floating plane: ------<----<----<----<----<----<----<----<----
dielectric1:
trace layer: ->---->---->---->---->---->---->---->---->----
dielectric2:
ground plane: <<----<----<----<----<----<----<----<----<----
The TDR signal is launched at point A, and is propagating to the right (as
indicated by the arrows on the trace layer).
Consider point B to be far from the TDR launch. At that point, 1/2 the
return current is travelling on the floating plane, and 1/2 is travelling on
the ground plane (indicated by the arrows to the left), since this is
symmetrical stripline. At point A (the TDR launch), however, ONE HUNDRED
PERCENT OF THE RETURN CURRENT must be traveling on the ground plane, since
that's what the ground of the TDR is connected to. How does the portion of
the return current traveling on the floating plane "magically" jump over to
the ground plane? Clearly it's capacitive coupling, but that's a lot of
current in a short distance.
This question vexed me for quite a while. Eric Bogatin was less surprised,
and explained that, if you could look at the current densities close to
point A, you would see the current reach zero at the plane's edge (it has
to), be 1/2 the total current some distance from point A, and somewhere
between those 2 extremes at points close to A. A 3-D solver would show it
nicely (I'm lazy, and just took Eric's word).
Eventually, I could reconcile myself to what was physically happening, but
the correct model for what was happening was VERY non-intuitive. If it was
easy, we'd get minimum wage.
Jeff Loyer
-----Original Message-----
From: Loyer, Jeff W
Sent: Wednesday, June 26, 2002 7:57 AM
To: 'Ege Engin'; Loyer, Jeff W; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: reference plane
The short answer to your second question (Is this amount of AC decoupling
achievable solely through the interplane
capacitance?) is yes.
The short answer to your first question is yes, you would get the same
measurement if you measured a trace between 2 ground planes. The following
is a longer response to that question; it's an extract of an experiment I
did:
I found that, when TDR'ing a stripline trace that was referenced to both
power and ground, I got the same impedance whether decoupling caps were
populated or not. Actually, instead of a cap, I physically shorted power and
ground pins together at the launch point to keep even the parasitics of a
capacitor out of the equation. What I found was that, for the stackup (5mil
trace 7 mils above ground and 7 mils below Vcc), I saw no substantial
difference, regardless of whether I measured:
(1) with the probe referenced to GND,
(2) referenced to VCC, and
(3) with GND and VCC shorted together (at the launch).
Also, TDR'ing between the two planes shows a dead short.
The risetime was ~50pS (a TEK TDR), and I even slowed the risetime down to
400pS, no change. I'm pretty sure rise-time is not a factor.
FURTHER INVESTIGATION (in case you're interested): I wondered if, by
definition of this symmetrical stripline, there isn't enough capacitance
between the planes that the return current has a low impedance path to the
reference plane. I.E., TDR'ing between the 2 planes shows a dead short - no
need for external caps (or a shorting bar, in my case).
This worked until I thought of the case of asymmetrical stripline - would
the impedance measured depend on which plane you were referenced to? So, I
built myself some crude asymmetric stripline (using a TDR characterization
board from TEK as a starting point).
I took a microstrip trace and added a layer of Kapton tape over it, with a
sheet of copper over that. This turned the microstrip into a stripline,
with the 2nd plane floating. I TDR'ed the trace relative to Gnd, then
relative to the floating plane, and with the planes shorted together at the
source (again, relative to Gnd and the floating plane).
I then added another layer of Kapton tape between the trace and the floating
plane, and repeated the measurements.
I did this until I had 8 layers of Kapton tape between the trace and the
floating plane.
Granted, this was a pretty crude experiment and there were clearly some
measurement errors, but some things were pretty obvious.
Findings:
1) Regardless of the Kapton thickness, the lower impedance measured
(referenced to Gnd or the floating plane) was approximately the same as that
as when the planes were shorted together.
2) With thin dielectrics (in the range that we typically use, < 7mils), the
impedance was approximately the same regardless of which plane was used as a
reference, and whether they were shorted together at the source.
Conclusions:
1) When TDR'ing stripline, it probably won't matter which plane we use as
reference. If in doubt, I would TDR relative to whichever plane was closest
to the trace. If still not convinced, I would short the 2 planes together
at the source.
2) I would ensure that, when using stripline with both power and ground
planes, the trace is closer to ground than power. This is assuming the
signal is routed relative to ground elsewhere.
3) I believe that a correct model for what I'm seeing is - it's the parallel
combination of Trace-to-Plane1, Trace-to-Plane1, and Plane-to-Plane
impedances that makes up the final impedance for a trace, relative to either
Plane1 or Plane2.
Jeff Loyer
-----Original Message-----
From: Ege Engin [mailto:engin@xxxxxxxxxx]
Sent: Wednesday, June 26, 2002 2:19 AM
To: jeff.w.loyer@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: reference plane
Jeff,
If the stripline has an equal distance from the power and ground planes,
then
logically the measurements with respect to ground or power would be the
same.
But your measurements also show that, a stripline between two ground planes
(i.e., the two planes are shorted at measurement ports) would give the same
results. Please correct me, if I misunderstood you.
Is this amount of AC decoupling achievable solely through the interplane
capacitance?
Regards,
Ege
"Loyer, Jeff W" schrieb:
> A few thoughts, extracted from my response to a similar question...
>
> The original question from last October:
> An internal signal layer in a multi-layer stackup is situated between
ground
> and a power plane. If the power plane splits into two islands is the
effect
> significant on the signal layer? (Dielectric thickness between layers = 8
> mil.)
>
> My response:
> Assuming your planes are very wide, and since the space between the planes
> is kept small, there shouldn't be any significant effect to Z0 at these
> geometries.
>
> I had the opportunity to measure impedances of stripline traces which run
> between ground and power planes. I found that the TDR was identical
> regardless of which plane I measured relative to. After some
investigation,
> I concluded that for the geometries involved (only 14mils between planes),
> the coupling between the planes was strong enough that, AC-wise, they were
> one and the same.
>
> The identical situation should hold true for your configuration, if your
> planes are wide enough to have strong coupling between them and ground,
and
> the space between the 2 planes isn't wide enough to cause a discontinuity.
>
> In summary,
> If there is strong coupling between the ground and power planes, they are
> essentially the same for high-speed reference. If they aren't strongly
> coupled, there will definitely be a difference between which is the
> reference. People have used "stitching caps." (capacitors between the two
> planes at the location where the signal transitions from one reference to
> another) to remedy the problem, but I'm skeptical of the value of these.
> For the rise-times we're at today, I believe those caps. would have little
> real value (the parasitics would be too great). I.E., a TDR done without
> the caps. populated would look the same as one done with the caps. in
place.
>
> I believe the best approach is to either keep referenced to the same plane
> throughout the entire topology (and most chips reference signals to
ground),
> or only transition between planes which are strongly coupled.
>
> My 2 cents.
>
> Jeff Loyer
>
> -----Original Message-----
> From: evillaf@xxxxxxxxx [mailto:evillaf@xxxxxxxxx]
> Sent: Thursday, June 20, 2002 10:36 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] reference plane
>
> Can anyone explain the advantages and disadvantages of
> using a power plane for a reference plane instead of a
> ground plane? I have always used both as a DC reference
> in the past. Now I am beginning to hear arguments that
> only GND planes should be used for critical signals.
> This becomes somewhat impractical for some boards.
>
> Thanks in advance.
> Ellis
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