"Nico Fleurinck" <nico.fleurinck@xxxxxxxxxxxx> writes: > Dear all, > For a virtex-II FPGA (XC2V2000) the power-on ramp must be minimum 1ms and ^^^^ This one will need A LOT of power, unless you mean the XC2V200... [...] > Can anybody tell me how you can control the power on ramp of a certain > voltage. It works perfectly well if you just use an ordiary low drop fixed voltage regulator, at least in my experience. -- Dr. Juergen Hannappel http://lisa2.physik.uni-bonn.de/~hannappe mailto:hannappel@xxxxxxxxxxxxxxxxxx Phone: +49 228 73 2447 FAX ... 7869 Physikalisches Institut der Uni Bonn Nussallee 12, D-53115 Bonn, Germany CERN: Phone: +412276 76461 Fax: ..77930 Bat. 892-R-A13 CH-1211 Genève 23 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu