[SI-LIST] Re: pci driver strength
- From: "Peterson, James F (FL51)" <james.f.peterson@xxxxxxxxxxxxx>
- To: SI <si-list@xxxxxxxxxxxxx>
- Date: Thu, 2 Aug 2001 12:53:18 -0400
Tom Dagostino makes an excellent point on my last e-mail. Vdd might not be
the max voltage swing for the source impedance calculation....it could be
less. (see his comments in below text.)
(thanks Tom.)
regards,
Jim
-----Original Message-----
From: Dagostino, Tom [mailto:tom_dagostino@xxxxxxxxxxx]
Sent: Thursday, August 02, 2001 12:34 PM
To: 'james.f.peterson@xxxxxxxxxxxxx'
Subject: RE: [SI-LIST] Re: pci driver strength
Hi Jim
Careful about using Vdd in these calculations. Many devices do not have
CMOS pull up characteristics but behave more like a bipolar device. Thus
the output hi is not Vdd but more like Vdd minus 1 to 2 volts. If this kind
of driver is placed on an open transmission line then the final value can be
misleading.
To do the calculation you should see what output voltage the driver will
produce lightly loaded and then driving into either a transmission line or
equivalent resistive load. The light load (1 to 10K) will put the driver
onto the truly on mode. You can then calculate the output impedance.
Tom Dagostino
Modeling Manager
Mentor Graphics Corp.
SAE
tom_dagostino@xxxxxxxxxx
503-685-1613
-----Original Message-----
From: Peterson, James F (FL51) [mailto:james.f.peterson@xxxxxxxxxxxxx]
Sent: Thursday, August 02, 2001 7:00 AM
To: SI
Subject: [SI-LIST] Re: pci driver strength
Ivor,
This is kind of related to the another question I raised about buffer driver
strengths in general.
How does one describe a buffer's drive strength? I believe the only answer
is with it's source impedance. This can be derived from a transmission line
by measuring the porch voltage of the signal as it is launched onto the
t-line (since you know the porch voltage level, Vdd, and the impedance of
the t-line, you can solve for the source impedance).
So to answer your question : you're right, there is no reflection level
requirement. But there is a VI curve requirement that source impedance can
be derived from (Zs should be the slope of the curve). If you look at the VI
curves in the spec it shows a shaded area where the drive strength (or
source Z) can be in.
You can then compare it to your measurements from your spice sim's. (Spice
sim should include a long t-line of a known value. Measure the initial
voltage launched onto the t-line (sometimes referred to as the porch
voltage)and solve for Zsource.
regards,
Jim
-----Original Message-----
From: IVOR TING [mailto:ivor.ting@xxxxxxxxxxx]
Sent: Wednesday, August 01, 2001 7:42 PM
To: SI
Subject: [SI-LIST] pci driver strength
Hi,
I am working on an ASIC that has a 3.3V PCI 2.1 complianace interface
and I am doing hspice simulation on the output buffer. I understand
PCI uses reflected wave switching, so a buffer must not be too strong.
My question is, is there a requirement saying that if the output before
reflection is higher than a certain voltage, the driver is too strong?
I couldn't find it in the specification itself.
Thanks.
Ivor.
--
**************************************************************
Ivor Ting Email: ivor.ting@xxxxxxxxxxx
ASIC Development, Alcatel CID Phone: (604)-453-3208
Suite 400-4190 Still Creek Drive Fax : (604)-421-2644
Burnaby, B.C., Canada, V5C 6C6 Web : www.cid.alcatel.com
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