[SI-LIST] Re: package SSN model accuracy requirements

  • From: "Todd Westerhoff (twesterh)" <twesterh@xxxxxxxxx>
  • To: <michael.mirmak@xxxxxxxxx>, <weirsi@xxxxxxxxxx>, <gary_pratt@xxxxxxxxxxx>, <Chris.Cheng@xxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 14 Mar 2005 09:27:29 -0500

Okay, I'll probably get flamed for asking this, but it's worth the risk

When we talk about AMS, it seems to me we're really talking about two things
in practice - VHDL-AMS and Verilog-AMS.

If a vendor walked in today and plunked down a CD with VHDL-AMS model on it,
my guess is that they would have developed it with Mentor tools.  I'd also
guess that they wouldn't have tested it with the Cadence toolset, nor have
plans to.

I think the converse is also true - a Verilog-AMS model was likely developed
with Cadence tools and not tested with their Mentor counterparts.

I don't know which vendors support AMS beyond Cadence and Mentor.  There
certainly could be others, I'm just not aware of them.

So - my question (you knew it would come along eventually, right?)

In current practice, doesn't AMS end up essentially being a vendor-specific
solution?  I fully understand that this is a new technology and that my
question isn't "fair" from a long term point of view.  But - as others have
said - we get measured on what we do today to deliver product in the near
term.  Simulation technologies that hold promise two years out are fine, but
they have little immediate impact.

I'm just wondering if I'm right with my current impressions about
Verilog-AMS and VHDL-AMS being vendor-specific in practice.  If that really
is the case, then I'm also wondering how we propose to get from where we are
now to a point where we have models that are portable across tools again.


Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave - Boxboro, MA - 01719
ph: 978-936-2149

"Always do right.
 This will gratify some people and astonish the rest."

- Mark Twain

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