[SI-LIST] Re: options for reducing EMI

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Mon, 01 Sep 2014 16:03:49 -0700

This is another infamous:  "It depends".

First:  Will any combination of anticipated measures yield a solution 
that meets both your SI and EMC requirements?
Second: Do you prioritize margin to SI or EMC, or split them?

It sounds like you have a design that has failed EMC.  Before twiddling 
anything that you can look at where you are failing and how badly.

TX swing can only reduce noise in the best case dB for dB.  So, if you 
just need a couple of dB to squeak by and have the link budget, it is an 
option.
SSC can buy up to 10dB on the clock and harmonics.
Edge rate could help if you have resonance issues.  Otherwise, it is 
similar to fiddling with the Tx swing.

Steve
On 9/1/2014 1:43 PM, Chen, Sherman wrote:
> Hi SI Gurus,
> We are considering the following options in order to reduce the EMI of one of 
> our boards, which is mainly caused by the PCIe Gen3 link:
>
> 1.       Reducing TX swing.
>
> 2.       Turn on SSC.
>
> 3.       Slowing down edge rate.
> While we are running test to verify which option will bring us the best 
> result & least impact, any comments or suggestions from those who had 
> experiences on this matter?
>
> Best Regards,
>
> Sherman Chen
> Signal Integrity
> EMC Global Hardware Engineering
> Tel: +86 21 60951100-3329
>
>
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