[SI-LIST] Re: modelling of wire as w-element transmission line
- From: Ray Anderson <Raymond.Anderson@xxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 25 Jun 2002 10:38:36 -0700 (PDT)
>by having its width eqaul to the size of the actual length of the shorter
>conductor in strip SHAPE statement and length equal to actual width. But the
>spice file keeps running in an infinite loop.
>
>The spice file is attached.
>
>If any one has any clue to this please help me.
>Thank you.
>Jayanta Choudhury
Without addressing any of your questions, I just tried running your
Hspice deck to see what transpired. The simulation crashed within
20 seconds of invoking it with this error message:
-----------------------------------------------------------
Run-time exception error; current exception: xalloc
No handler for exception.
Abort
------------------------------------------------------------
(This was with Hspice v2001.2 running on a solaris platform)
The .st0 status file looks like this:
Init: hspice initialization file: /import/cadist/pkgs/hspice/hspice,v2001.2.sun
init: begin read circuit files, cpu clock= 2.98E-01
option scale = 1.000E-07
init: end read circuit files, cpu clock= 3.22E-01 memory= 14 kb
init: begin check errors, cpu clock= 3.22E-01
Did your simulation get any further ?
I tend to not use the built-in field solver to generate RLGC
parameters as I've got more faith in some of the stand-alone solvers
that we have available.
-Ray Anderson
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