=20 I need to establish the voltage point where a flop's clock input allows the read of its D input.=20 There is some combinatorial logic in the same device. I was thinking that it would be easier to measure the switching threshold on an "and" gate.=20 The question is, if I measure the switching threshold on an "and" gate will it be the same as the switching threshold on a flop's clk input? both are in the same device and have the same technology.=20 (visualizing a flop as a circuit containing a bunch of nand gates, I'm guessing it is the same, but I'm not sure.) thanks. Jim Peterson Honeywell ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu