[SI-LIST] Re: junior designer question
- From: Robert Haller <rhaller@xxxxxxxxxx>
- To: nico.fleurinck@xxxxxxxxxxxx
- Date: Thu, 30 Jan 2003 08:23:53 -0500
Nico,
This is good question, that often challenges designers.
One crucial missing piece of information is how fast you plan on running
this interface. Some of the issues you will encounter is that one of the
transfers (flash) may have multiple cycles to settle out, while other
transfers will not.
My suggestion is to draw a block diagram of the interface, with all the
timing components (tco, Wire delay, setup and hold) then do a "back of
the envelope" timing analysis. This multidrop bus you are designing will
probably require some SI simulations unless timing margins are generous.
After you have designed the interface, rerun simulations to verify your
assumptions, and if possible perform a complete post layout signal
integrity and timing analysis.
One additional suggestion is if you do require address buffers, utilize
the 1622 version (of the buffer) that contains series terminated
outputs. The clean edges and resulting reduction in wire delay will more
than make up for the additional Tco (clock to out delay) timing penalty
incurred by the part.
Regards,
bob
--
Robert J. Haller (rhaller@xxxxxxxxxx)
Principal Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 15
Nico Fleurinck wrote:
> Dear experts,
> For my design I need to connected several memories with a virtex (FPGA)
> I have the following memories:
> 10xSRAM CY7C1069AV33
> 5xSDRAM MT48LC16M16
> 1xFLASH AM29LV017D
> 1xPROM SMJ27C010
> All memories are sharing the same address bus.
>
> Can you tell me how i can determine if i need to use a address buffer?
> What are the characteristics that are importent?
> I you have documents of application notes that describe how to determine the
> need of a buffer, please let me know.
>
> I'm thinking to use the 54LVTH16244A of TI, but i need to calculate that
> this driver is OK for my design.
>
> Please let me know if you can help me.
>
> Best regards,
> Nico
>
> Nico Fleurinck
> Junior Design Engineer
> VERHAERT Satellites & Platforms
> Hogenakkerhoekstraat 21
> B-9150 Kruibeke
>
> Tel : +32 3 250.1984
> Fax : +32 3 254.1008
> e-mail : nico.fleurinck@xxxxxxxxxxxx
> Visit us : www.verhaert.com
>
>
>
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