[SI-LIST] hspice simulation issue in VCO
- From: Bi Han <mike_bihan@xxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 31 Dec 2002 21:53:21 +0800 (CST)
I have got a problem with hspice simulation of VCO.
When I am simulating netlist as below, the simulation results will be
incorrect.
As we can see, the resistor R1 & R2 is the loss resistor of spiral inductor.
If we tune their value to 0, the simulation results will be very weird. That
is:
the voltage at output node will be greater than the supply voltage.
Also, the .lis file sometimes contains lines as follow:
"warning" negative-mos conductance =......
Some very kind people did helped me to explain it. I will quote their reply at
the end of this mail.
however, i will still hold the question that why not MOSFET limiting effect
work to limit their output?
* # FILE NAME: /DISK2/WORK/HBI/SIMULATION/PAN/HSPICES/SCHEMATIC/NETLIST/
* Generated on Dec 31 01:38:15 2002.
MN2 NET21 NET23 0 0 N18 L=500E-9 W=235E-6 M=1.0
MN1 NET23 NET21 0 0 N18 L=500E-9 W=235E-6 M=1.0
C0 NET23 NET9 1E-12 M=1.0
C1 NET21 NET9 1E-12 M=1.0
L1 NET3 NET6 3E-9 M=1.0
L2 NET3 NET22 3E-9 M=1.0
R3 0 NET9 3E6 M=1.0 **DC path
R1 NET6 NET23 20.0 M=1.0 **loss resistor of spiral inductor
R2 NET22 NET21 20.0 M=1.0 **loss resistor of spiral inductor
R5 VCC NET3 300.0 M=1.0 **resistor cause voltage drop
VDD VCC 0 2.5
* Include files
* End of Netlist
.TRAN 1.0000 5.0000 START= 0.
.TEMP 25.0000
.OP
.save
.OPTION INGOLD=2 ARTIST=2 PSF=2
+ PROBE=0
.END
_______________________________________________
Hi,
It is not werid to have voltages greater than the supply rails when you have
inductors in your circuit. More common even, if the series parasitic resistors
are zero, which means that the quality factor is infinite. Remember that the
inductor keeps the current through it continuous, which can make a huge voltage
among the terminals. Have you never tried a big inductor in parallel with a
1.5V battery and suddenly disconnected the batery, holding the inductor
terminals in contac with you??
The negative conductance can arise from a self heating of the transistor. It
depends on the model you're using. If it is due to self heating, when your
transitor is driven by a big GVO (Vg-Vth), some models take into account the
increase on the substrate temperature givin rise to a reduction of Id as Vd
increases. That means that the output conductance becomes negative.
What model do you use?
______________________________________________________________________
I used to think this was weird also, but now I look at it like this:
the inductor/capacitor form a tank circuit... and it is very literally that, a
tank that stores. This is what allows it to get above the supply voltage,
storage. So lets say that you store some amount during one cycle, then next
cycle, because your gain is greater than one, you have all the energy you had
previously, plus a little more. And so on, and so on. It is only the resistive
and nonlinear part of the circuit that ends up limiting this amplitude.
There are other circuits called "pump" circuits that use a somewhat similar
method of getting "dc" voltages above the supply. They pump a current onto a
capacitor then switch it to add to the supply. As long as it is driving a large
impedance (i.e. a capacitive load) then it isn't really supplying much current
and the power lost is minimal.
Hope this helps. The above explanation was also good
---------------------------------
Do You Yahoo!?
"IBMÓŻݼÛÌØȨ£¬ËÏÈÀ´ËÏȵã¡"
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
