[SI-LIST] Re: how to model the via in Sigexplorer610
- From: "Kai Keskinen" <kalevi@xxxxxxxxxx>
- To: <vigneshwara.upadhyaya@xxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 28 Jun 2006 17:59:29 -0400
Vignesh:
You could also read a few of the papers here for more details.
http://www.cdnusers.org/Articles/Siliconpackageboard/tabid/118/Default.aspx?
topic=Signal%20Integrity&sort=date&toggle=none&abs=0&subtopic=Multi-GigaHert
z
Like most of the Allegro PCB tools, it is hard to figure out without some
kind of example that walks you through it or with help from a more advanced
user.
The application notes (through the help menu) and the SourceLink web site
can certainly get you started. To access SourceLink, you just need a valid
hostID.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Vigneshwara Upadhyaya
Sent: Tuesday, June 27, 2006 2:31 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] how to model the via in Sigexplorer610
Importance: High
Hi,
Needed information on how to model a VIA in Sigexplorer.
Is there any ready library available for via?
I could not get more info on this in Google.
Thanks
Vignesh
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