[SI-LIST] Re: ground planes at top / bottom layer

  • From: Richard Jungert <r_jungert@xxxxxxxxxxx>
  • To: OLANEY JUNO <olaney@xxxxxxxx>, si list freelist <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 2 Jan 2009 05:55:59 -0800

Orin or Lee.

I think this idea of grounding outside layers on PCB'S may come from the shield 
idea much like a shield on a coax cable or a Faraday cage.  What really happens 
is that the extra copper one adds on outside layers connecting them to ground 
may very well cover up some big problem one created on internal layers from 
doing fast and furious layout.   Sometimes a layout engineer has to make 
recommendations to principal E.E.s as to where to add resistors as well to 
control impedance.  Many many times I have seen boards that needed 37 ohm or 50 
ohm resistors on digital lines that were omitted in the design process etc. 

If one takes the time ( the key is to take extra time to do it right )  and 
control impedance on all traces then the board will pass EMC tests without 
problems.  PCB design doesn't have to be a fire drill where alot of mistakes 
can be made. It takes time and smart planning to do a good circuit board and 
all engineers and managers have to buy into this idea.  

Richard Jungert
180 circuit board designs
2 US patents in mixed signal processing










> To: leeritchey@xxxxxxxxxxxxx
> CC: bernd.schuster12@xxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> Date: Thu, 1 Jan 2009 18:47:47 -0800
> Subject: [SI-LIST] Re: ground planes at top / bottom layer
> From: olaney@xxxxxxxx
> 
> "...had to be ground in order to pass EMI?"  Did anyone actually make
> that assertion?
> Orin
> 
> 
> On Thu, 1 Jan 2009 18:10:44 -0800 "Lee Ritchey"
> <leeritchey@xxxxxxxxxxxxx> writes:
> > To all of those who recommend ground layers on the outside of PCBs to
> > control EMI, take a look at a PC mother board or the motherboard in 
> > the
> > Xbox. They are 4 layer PCBs that have signals on both outside layers 
> > and
> > the products in which they are shipped pass EMI standards.
> > 
> >   My guess is it is an RE.
> > 
> > Lee Ritchey
> > 
> > 
> > > [Original Message]
> > > From: bernd schuster <bernd.schuster12@xxxxxxxxxxxxxx>
> > > To: <si-list@xxxxxxxxxxxxx>
> > > Date: 12/30/2008 12:27:11 PM
> > > Subject: [SI-LIST] ground planes at top / bottom layer
> > >
> > > Hi,
> > > I`ve one small question about the usage of ground planes at the 
> > top and
> > > bottom layer. I thought it would be great to use them, but the 
> > atmel
> > > evaluation boards (for example) do not use an ground plane on the 
> > top
> > layer
> > > or bottom layer. They use for example an 8 layer stack design 
> > (where
> > layer 5
> > > is a vcc plane and layer 2 is a ground plane).
> > >
> > > Are there any disadvantages of using ground planes at the top / 
> > bottom
> > > layer? In my first 4-layer board I use ground planes at the top, 
> > bottom
> > and
> > > at the second layer. I connect them with a lot of vias.
> > >
> > >
> > > best regards
> > > Bernd
> > >
> > >
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