[SI-LIST] Re: ground planes at top / bottom layer
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "bernd schuster" <bernd.schuster12@xxxxxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Thu, 1 Jan 2009 18:10:44 -0800
To all of those who recommend ground layers on the outside of PCBs to
control EMI, take a look at a PC mother board or the motherboard in the
Xbox. They are 4 layer PCBs that have signals on both outside layers and
the products in which they are shipped pass EMI standards.
Where did the notion that outer layers had to be ground in order to pass
EMI come from? My guess is it is an RE.
Lee Ritchey
> [Original Message]
> From: bernd schuster <bernd.schuster12@xxxxxxxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Date: 12/30/2008 12:27:11 PM
> Subject: [SI-LIST] ground planes at top / bottom layer
>
> Hi,
> I`ve one small question about the usage of ground planes at the top and
> bottom layer. I thought it would be great to use them, but the atmel
> evaluation boards (for example) do not use an ground plane on the top
layer
> or bottom layer. They use for example an 8 layer stack design (where
layer 5
> is a vcc plane and layer 2 is a ground plane).
>
> Are there any disadvantages of using ground planes at the top / bottom
> layer? In my first 4-layer board I use ground planes at the top, bottom
and
> at the second layer. I connect them with a lot of vias.
>
>
> best regards
> Bernd
>
>
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