[SI-LIST] Re: f vs. Tf vs. jitter
- From: steve weir <weirsi@xxxxxxxxxx>
- To: a.ingraham@xxxxxxxx
- Date: Tue, 19 Jun 2007 12:00:04 -0700
Andy, in a PLL the stability of the VCO, as well as noise and leakage in
the phase comparator and error amplifier plays directly to jitter.
Those all get magnified by the phase comparator interval compared to the
nominal VCO interval in a digital, or traditional mixed analog / digital
PLL. In a pure analog PLL using multipliers there is still the issue of
multiplier linearity and noise. This was somewhat central to Chris
Cheng's objection to the huge ratio between VCO operating frequency and
phase comparator interval for certain signaling standards. That tall
ratio belabors the analog electronics with greater stability and noise
sensitivity than would be necessary with a shorter ratio.
Best Regards,
Steve.
Andrew Ingraham wrote:
> Steven,
>
> "Analog frequency synthesis techniques" includes a PLL, even with digital
> counters and dividers in it. (As opposed to direct digital frequency
> synthesis.)
>
> As such, analog frequency synthesizers can be easily programmed for
> different division ratios and operating frequencies, especially as far as
> the output is concerned. And they do not necessarily have the problem with
> slew rate when generating low-frequency events.
>
> There are also analog based synthesis techniques that don't use digital
> counters and such, only analog circuits (though some are nonlinear,
> frequency multipliers and such). But these are less common.
>
> If you are talking about a need to generate sine waves, then yes there is a
> link between frequency and slew rate OF THAT OUTPUT SIGNAL. But that is
> because of the desired output waveform, not the method of frequency
> synthesis.
>
> But if you have a need to trigger something downstream, then a sine wave
> output is potentially a poor choice, especially if there is a need for wide
> frequency ranges and/or very low-frequency events.
>
> In your situation I'd be tempted to stay with digital counters to get from
> 80MHz to 10Hz, as opposed to a PLL unless I needed an odd ratio or
> something. If phase tweaking is necessary, the presence of 80MHz ought to
> give them the ability to minimize the amount of analog delay adjustment that
> is necessary.
>
> Yes, it's true that electronic (analog) delay lines generate lots of jitter
> and that it increases with their delay time.
>
> NIST has a number of references (such as the Time and Frequency User's
> Manual, which I think they now have on-line) that talk about things like
> locked lasers, in a little bit of detail that might give you some hints
> about how it's done.
>
> Seven orders of magnitude isn't necessarily an issue; I mean it's not like
> trying to make a PLL itself operate over 7 orders of magnitude, or a linear
> RF amp over a similar amplitude range. If you think of it as a weak loop
> where the second oscillator (laser) is mostly free-running and has low
> jitter, and just needs occasional updates to tweak its phase, then it's not
> so bad. There are trade-offs and limitations (won't work if the second osc.
> wanders too much), but if these are managed, 7 orders of magnitude is not
> necessarily a problem.
>
> Keep in mind ... if you will be talking to a room full of PhDs, they will
> probably take over the conversation anyway and steer it where they want it
> to go, and you can't help but be made to feel like a fool. Just don't sweat
> it.
>
> Regards,
> Andy
>
>
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